cxp upconn firmware: packet testing

src/libboard_artiq/src/cxp_upconn.rs

@@ -0,0 +1,42 @@
+use embedded_hal::prelude::_embedded_hal_blocking_delay_DelayUs;
+use libboard_zynq::timer::GlobalTimer;
+
+pub use crate::cxp_proto;
+use crate::pl::{csr, csr::CXP};
+
+pub fn tx_test(channel: usize, timer: &mut GlobalTimer) {
+    const LEN: usize = 4 * 30;
+    let mut pak_arr: [u8; LEN] = [0; LEN];
+
+    unsafe {
+        // cxp_proto::read_u32(channel, 0x00).expect("Cannot Write CoaXpress Register");
+        // cxp_proto::write_u64(channel, 0x00, 0x01);
+        // cxp_proto::send(channel, &cxp_proto::Packet::EventAck { packet_tag: 0x04 }).expect("Cannot send CoaXpress packet");
+        // cxp_proto::send(channel, &cxp_proto::Packet::TestPacket).expect("Cannot send CoaXpress packet");
+
+        timer.delay_us(2); // send one word
+        // DEBUG: Trigger packet
+        (CXP[channel].upconn_trig_delay_write)(0x86);
+        (CXP[channel].upconn_linktrigger_write)(0x00);
+        (CXP[channel].upconn_trig_stb_write)(1); // send trig
+
+        // DEBUG: Trigger ACK packet
+        // CXP[channel].upconn_ack_write(1);
+
+        timer.delay_us(20);
+        (CXP[channel].upconn_tx_enable_write)(0);
+
+        // Collect data
+        let mut i: usize = 0;
+        while csr::cxp_phys::upconn_tx0_debug_buf_dout_valid_read() == 1 {
+            pak_arr[i] = csr::cxp_phys::upconn_tx0_debug_buf_dout_pak_read();
+            csr::cxp_phys::upconn_tx0_debug_buf_inc_write(1);
+            i += 1;
+            if i == LEN {
+                break;
+            }
+        }
+
+        cxp_proto::print_packet(&pak_arr);
+    }
+}