diff --git a/src/gateware/cxp.py b/src/gateware/cxp.py index 65a991b..7531830 100644 --- a/src/gateware/cxp.py +++ b/src/gateware/cxp.py @@ -125,41 +125,28 @@ class UpConn_Interface(Module, AutoCSR): # tags implementation is on firmware self.submodules.command = command = TX_Command_Packet(layout) - + self.comb += command.source.connect(upconn_phy.tx_fifos.sink[2]) # DEBUG: OUTPUT - self.submodules.command_out = command_out = stream.SyncFIFO(layout, 64) - self.comb += command.source.connect(command_out.sink) + # self.submodules.command_out = command_out = stream.SyncFIFO(layout, 64) + # self.comb += command.source.connect(command_out.sink) - self.command_inc = CSR() - self.command_dout_pak = CSRStatus(8) - self.command_kout_pak = CSRStatus() - self.command_dout_valid = CSRStatus() + # self.command_inc = CSR() + # self.command_dout_pak = CSRStatus(8) + # self.command_kout_pak = CSRStatus() + # self.command_dout_valid = CSRStatus() - self.sync += [ - # output - command_out.source.ack.eq(self.command_inc.re), - self.command_dout_pak.status.eq(command_out.source.data), - self.command_kout_pak.status.eq(command_out.source.k), - self.command_dout_valid.status.eq(command_out.source.stb), - ] + # self.sync += [ + # # output + # command_out.source.ack.eq(self.command_inc.re), + # self.command_dout_pak.status.eq(command_out.source.data), + # self.command_kout_pak.status.eq(command_out.source.k), + # self.command_dout_valid.status.eq(command_out.source.stb), + # ] - self.specials += [ - # pmod 0-7 pin - Instance("OBUF", i_I=command.pak_wrp.sink.stb, o_O=pmod_pads[0]), - Instance("OBUF", i_I=command.pak_wrp.sink.ack, o_O=pmod_pads[1]), - Instance("OBUF", i_I=command.pak_wrp.source.stb, o_O=pmod_pads[2]), - Instance("OBUF", i_I=command.pak_wrp.source.ack, o_O=pmod_pads[3]), - Instance("OBUF", i_I=command_out.sink.stb, o_O=pmod_pads[4]), - Instance("OBUF", i_I=command_out.sink.ack, o_O=pmod_pads[5]), - Instance("OBUF", i_I=command_out.source.stb, o_O=pmod_pads[6]), - Instance("OBUF", i_I=command_out.source.ack, o_O=pmod_pads[7]), - ] - - - self.symbol2 = CSR(9) - self.sync += [ - upconn_phy.tx_fifos.sink[2].stb.eq(self.symbol2.re), - upconn_phy.tx_fifos.sink[2].data.eq(self.symbol2.r[:8]), - upconn_phy.tx_fifos.sink[2].k.eq(self.symbol2.r[8]), - ] + # self.symbol2 = CSR(9) + # self.sync += [ + # upconn_phy.tx_fifos.sink[2].stb.eq(self.symbol2.re), + # upconn_phy.tx_fifos.sink[2].data.eq(self.symbol2.r[:8]), + # upconn_phy.tx_fifos.sink[2].k.eq(self.symbol2.r[8]), + # ]