forked from M-Labs/artiq-zynq
WRPLL: remove anti-windup
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8409788158
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4700d4c9ed
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@ -335,8 +335,6 @@ pub mod wrpll {
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const COUNTER_WIDTH: u32 = 24;
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const DIV_WIDTH: u32 = 2;
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// 4 ppm capture range
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const ADPLL_LIM: i32 = (4.0 / 0.0001164) as i32;
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// Low pass filter
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// y[n] = B0*x[n] + B1*x[n-1] + B2*x[n-2] - A1*y[n-1] - A2*y[n-2]
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const B0: f64 = 0.07209205036273991;
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@ -535,10 +533,9 @@ pub mod wrpll {
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fn helper_pll() -> Result<(), &'static str> {
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let period_err = tag_collector::get_period_error();
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unsafe {
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let adpll = (((B0 * period_err as f64) + (B1 * PERIOD_ERR1 as f64) + (B2 * PERIOD_ERR2 as f64)
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let adpll = ((B0 * period_err as f64) + (B1 * PERIOD_ERR1 as f64) + (B2 * PERIOD_ERR2 as f64)
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- (A1 * H_ADPLL1 as f64)
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- (A2 * H_ADPLL2 as f64)) as i32)
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.clamp(-ADPLL_LIM, ADPLL_LIM);
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- (A2 * H_ADPLL2 as f64)) as i32;
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set_adpll(i2c::DCXO::Helper, BASE_ADPLL + adpll)?;
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H_ADPLL2 = H_ADPLL1;
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PERIOD_ERR2 = PERIOD_ERR1;
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@ -551,10 +548,9 @@ pub mod wrpll {
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fn main_pll() -> Result<(), &'static str> {
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let phase_err = tag_collector::get_phase_error();
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unsafe {
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let adpll = (((B0 * phase_err as f64) + (B1 * PHASE_ERR1 as f64) + (B2 * PHASE_ERR2 as f64)
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let adpll = ((B0 * phase_err as f64) + (B1 * PHASE_ERR1 as f64) + (B2 * PHASE_ERR2 as f64)
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- (A1 * M_ADPLL1 as f64)
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- (A2 * M_ADPLL2 as f64)) as i32)
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.clamp(-ADPLL_LIM, ADPLL_LIM);
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- (A2 * M_ADPLL2 as f64)) as i32;
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set_adpll(i2c::DCXO::Main, BASE_ADPLL + adpll)?;
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M_ADPLL2 = M_ADPLL1;
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PHASE_ERR2 = PHASE_ERR1;
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