diff --git a/src/gateware/cxp_downconn.py b/src/gateware/cxp_downconn.py
index a6c9cf6..188d7ae 100644
--- a/src/gateware/cxp_downconn.py
+++ b/src/gateware/cxp_downconn.py
@@ -13,7 +13,7 @@ from functools import reduce
 from operator import add
 
 class CXP_RXPHYs(Module, AutoCSR):
-    def __init__(self, refclk, pads, sys_clk_freq, debug_sma, pmod_pads, master=0):
+    def __init__(self, refclk, pads, sys_clk_freq, master=0):
         self.qpll_reset = CSR()
         self.qpll_locked = CSRStatus()
         self.gtx_start_init = CSRStorage()
@@ -22,7 +22,7 @@ class CXP_RXPHYs(Module, AutoCSR):
         self.phys = []
         # # #
 
-        # For speed higher than 6.6Gbps, QPLL need to be used instead of CPLL
+        # For speed higher than 6.6Gbps, QPLL need to be used instead of CPLL - DS191 (v1.18.1) Table 9.1
         self.submodules.qpll = qpll = QPLL(refclk, sys_clk_freq)
         self.sync += [
             qpll.reset.eq(self.qpll_reset.re),