diff --git a/src/libboard_artiq/src/cxp_downconn.rs b/src/libboard_artiq/src/cxp_downconn.rs
index 35e1485..a193de2 100644
--- a/src/libboard_artiq/src/cxp_downconn.rs
+++ b/src/libboard_artiq/src/cxp_downconn.rs
@@ -9,14 +9,6 @@ pub fn main(timer: &mut GlobalTimer) {
         info!("turning on pmc loopback mode...");
         csr::cxp::loopback_mode_write(0b010); // Near-End PMA Loopback
 
-        // enable cxp gtx clock domains
-        csr::cxp::tx_start_init_write(1);
-        csr::cxp::rx_start_init_write(1);
-
-        info!("waiting for QPLL/CPLL to lock...");
-        timer.delay_us(50_000);
-        info!("tx_phaligndone = {} ", csr::cxp::txinit_phaligndone_read(),);
-
         loopback_testing(timer, 0x00, 0);
     }
 
@@ -62,6 +54,14 @@ pub fn main(timer: &mut GlobalTimer) {
             csr::cxp::control_bit_6_write(DATA[1][6]);
             csr::cxp::control_bit_7_write(DATA[1][7]);
 
+            // enable cxp gtx clock domains
+            csr::cxp::tx_start_init_write(1);
+            csr::cxp::rx_start_init_write(1);
+
+            info!("waiting for QPLL/CPLL to lock...");
+            timer.delay_us(50_000);
+            info!("tx_phaligndone = {} ", csr::cxp::txinit_phaligndone_read(),);
+
             // enable txdata tranmission thought MGTXTXP, required by PMA loopback
             csr::cxp::txenable_write(1);