From 354de66337596b80ea33973559c440b93de5e973 Mon Sep 17 00:00:00 2001
From: morgan <mc@m-labs.hk>
Date: Tue, 3 Sep 2024 12:21:32 +0800
Subject: [PATCH] cxp pipeline: refactor Trigger ack to use code_src

---
 src/gateware/cxp_pipeline.py | 61 ++++++------------------------------
 1 file changed, 10 insertions(+), 51 deletions(-)

diff --git a/src/gateware/cxp_pipeline.py b/src/gateware/cxp_pipeline.py
index 0d9dd75..e789a8a 100644
--- a/src/gateware/cxp_pipeline.py
+++ b/src/gateware/cxp_pipeline.py
@@ -53,59 +53,23 @@ class Trigger_ACK(Module):
     def __init__(self, layout):
         self.ack = Signal()
 
-        self.source = stream.Endpoint(layout)
-
         # # #
 
         # Section 9.3.2 (CXP-001-2021)
         # Send 4x K28.6 and 4x 0x01 as trigger packet ack
+        self.submodules.code_src = code_src = Code_Source(layout)
+        self.submodules.k_code_inserter = k_code_inserter = Code_Inserter(layout)
+        self.comb += [
+            code_src.stb.eq(self.ack),
+            code_src.data.eq(0x01),
+            code_src.k.eq(0),
+            k_code_inserter.data.eq(K(28, 6)),
+            k_code_inserter.k.eq(1),
 
-        cnt = Signal(max=4)
-        clr_cnt = Signal()
-        inc_cnt = Signal()
-
-        self.sync += [
-            If(clr_cnt,
-                cnt.eq(cnt.reset),
-            ).Elif(inc_cnt,
-                cnt.eq(cnt + 1),
-            )
+            code_src.source.connect(k_code_inserter.sink)
         ]
 
-        self.submodules.fsm = fsm = FSM(reset_state="IDLE")
-
-        fsm.act("IDLE",
-            clr_cnt.eq(1),
-            If(self.ack,
-               NextState("WRITE_ACK0")
-            )
-        )
-
-        fsm.act("WRITE_ACK0",
-            self.source.stb.eq(1),
-            self.source.data.eq(K(28, 6)),
-            self.source.k.eq(1),
-            If(cnt == 3,
-                clr_cnt.eq(1),
-                If(self.source.ack, NextState("WRITE_ACK1"))
-            ).Else(
-                inc_cnt.eq(self.source.ack)
-            )
-        )
-
-        fsm.act("WRITE_ACK1",
-            self.source.stb.eq(1),
-            self.source.data.eq(0x01),
-            self.source.k.eq(0),
-            If(cnt == 3,
-                self.source.eop.eq(1),
-                If(self.source.ack, NextState("IDLE"))
-            ).Else(
-                inc_cnt.eq(self.source.ack)
-            )
-        )
-
-        
+        self.source = k_code_inserter.source
 
 class Code_Inserter(Module):
     def __init__(self, layout, insert_infront=True, counts=4):
@@ -116,12 +80,8 @@ class Code_Inserter(Module):
         self.k = Signal.like(sink.k)
 
         # # #
-
         assert counts > 0
 
-        # TODO: make this cleaner
-        # FIX this to make it work for counts = 1
-
         cnt = Signal() if counts == 1 else Signal(max=counts)
         clr_cnt = Signal()
         inc_cnt = Signal()
@@ -214,7 +174,6 @@ class Packet_Wrapper(Module):
             pak_start.source.connect(pak_end.sink),
         ]
         
-
 @ResetInserter()
 @CEInserter()
 class CXPCRC32(Module):