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zc706 GW: use mem region getter

This commit is contained in:
morgan 2024-10-07 11:57:41 +08:00
parent 2ca9a3191d
commit 256f2f7e8c
1 changed files with 9 additions and 8 deletions

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@ -719,24 +719,25 @@ class CXP_FMC():
cxp_csr_group.append(cxp_name)
mem_size = cxp_interface .get_mem_size()
tx_mem_name = "cxp_tx" + str(i) + "_mem"
memory_address = self.axi2csr.register_port(cxp_interface.get_tx_port(), mem_size)
self.add_memory_region(tx_mem_name, self.mem_map["csr"] + memory_address, mem_size)
tx_mem_size = cxp_interface.get_tx_mem_size()
memory_address = self.axi2csr.register_port(cxp_interface.get_tx_port(), tx_mem_size)
self.add_memory_region(tx_mem_name, self.mem_map["csr"] + memory_address, tx_mem_size)
cxp_tx_mem_group.append(tx_mem_name)
rx_mem_name = "cxp_rx" + str(i) + "_mem"
memory_address = self.axi2csr.register_port(cxp_interface.get_rx_port(), mem_size)
self.add_memory_region(rx_mem_name, self.mem_map["csr"] + memory_address, mem_size)
rx_mem_size = cxp_interface.get_rx_mem_size()
memory_address = self.axi2csr.register_port(cxp_interface.get_rx_port(), rx_mem_size)
self.add_memory_region(rx_mem_name, self.mem_map["csr"] + memory_address, rx_mem_size)
cxp_rx_mem_group.append(rx_mem_name)
# DEBUG loopback tx memory
loopback_mem_name = "cxp_loopback_tx" + str(i) + "_mem"
loopback_mem_size = cxp_interface.get_loopback_tx_mem_size()
cxp_loopback_mem_group.append(loopback_mem_name)
memory_address = self.axi2csr.register_port(cxp_interface.get_loopback_tx_port(), mem_size)
self.add_memory_region(loopback_mem_name, self.mem_map["csr"] + memory_address, mem_size)
memory_address = self.axi2csr.register_port(cxp_interface.get_loopback_tx_port(), loopback_mem_size)
self.add_memory_region(loopback_mem_name, self.mem_map["csr"] + memory_address, loopback_mem_size)
self.add_memory_group("cxp_tx_mem", cxp_tx_mem_group)
self.add_memory_group("cxp_rx_mem", cxp_rx_mem_group)