sync with zc706 repos

Cargo.lock

@@ -150,7 +150,7 @@ dependencies = [
 [[package]]
 name = "libasync"
 version = "0.0.0"
-source = "git+https://git.m-labs.hk/M-Labs/zc706.git#614b1ef350edd8576fc71292fc89cf79a1810aba"
+source = "git+https://git.m-labs.hk/M-Labs/zc706.git#83ff37e10e721c436246fbf4a945af9516121d00"
 dependencies = [
  "embedded-hal",
  "libcortex_a9",
@@ -162,7 +162,7 @@ dependencies = [
 [[package]]
 name = "libboard_zynq"
 version = "0.0.0"
-source = "git+https://git.m-labs.hk/M-Labs/zc706.git#614b1ef350edd8576fc71292fc89cf79a1810aba"
+source = "git+https://git.m-labs.hk/M-Labs/zc706.git#83ff37e10e721c436246fbf4a945af9516121d00"
 dependencies = [
  "bit_field",
  "embedded-hal",
@@ -177,7 +177,7 @@ dependencies = [
 [[package]]
 name = "libcortex_a9"
 version = "0.0.0"
-source = "git+https://git.m-labs.hk/M-Labs/zc706.git#614b1ef350edd8576fc71292fc89cf79a1810aba"
+source = "git+https://git.m-labs.hk/M-Labs/zc706.git#83ff37e10e721c436246fbf4a945af9516121d00"
 dependencies = [
  "bit_field",
  "libregister",
@@ -186,7 +186,7 @@ dependencies = [
 [[package]]
 name = "libregister"
 version = "0.0.0"
-source = "git+https://git.m-labs.hk/M-Labs/zc706.git#614b1ef350edd8576fc71292fc89cf79a1810aba"
+source = "git+https://git.m-labs.hk/M-Labs/zc706.git#83ff37e10e721c436246fbf4a945af9516121d00"
 dependencies = [
  "bit_field",
  "vcell",
@@ -196,7 +196,7 @@ dependencies = [
 [[package]]
 name = "libsupport_zynq"
 version = "0.0.0"
-source = "git+https://git.m-labs.hk/M-Labs/zc706.git#614b1ef350edd8576fc71292fc89cf79a1810aba"
+source = "git+https://git.m-labs.hk/M-Labs/zc706.git#83ff37e10e721c436246fbf4a945af9516121d00"
 dependencies = [
  "compiler_builtins",
  "libboard_zynq",

runtime/link.x

@@ -1,8 +1,5 @@
 ENTRY(_boot_cores);
 
-STACK_SIZE = 0x8000;
-HEAP_SIZE = 0x1000000;
-
 /* Provide some defaults */
 PROVIDE(Reset = _boot_cores);
 PROVIDE(UndefinedInstruction = Reset);
@@ -37,29 +34,35 @@ SECTIONS
         *(.data .data.*);
     } > SDRAM
  
-    .bss (NOLOAD) : ALIGN(0x4000)
+    .bss (NOLOAD) : ALIGN(4)
     {
-        /* Aligned to 16 kB */
+        __bss_start = .;
         KEEP(*(.bss.l1_table));
         *(.bss .bss.*);
         . = ALIGN(4);
+        __bss_end = .;
     } > SDRAM
-    __bss_start = ADDR(.bss);
-    __bss_end = ADDR(.bss) + SIZEOF(.bss);
 
-    .heap (NOLOAD) : ALIGN(0x1000)
+    .heap (NOLOAD) : ALIGN(8)
     {
-        . += HEAP_SIZE;
+        __heap_start = .;
+        . += 0x1000000;
+        __heap_end = .;
     } > SDRAM
-    __heap_start = ADDR(.heap);
-    __heap_end = ADDR(.heap) + SIZEOF(.heap);
 
-    .stack (NOLOAD) : ALIGN(0x1000)
+    .stack1 (NOLOAD) : ALIGN(8)
     {
-        . += STACK_SIZE;
+        __stack1_end = .;
+        . += 0x1000000;
+        __stack1_start = .;
+    } > SDRAM
+
+    .stack0 (NOLOAD) : ALIGN(8)
+    {
+        __stack0_end = .;
+        . += 0x1000000;
+        __stack0_start = .;
     } > SDRAM
-    __stack_end = ADDR(.stack);
-    __stack_start = ADDR(.stack) + SIZEOF(.stack);
 
     /DISCARD/ :
     {

runtime/src/comms.rs

@@ -194,7 +194,7 @@ pub fn main(timer: GlobalTimer) {
 
     Sockets::init(32);
 
-    let control: Rc<RefCell<kernel::Control>> = Rc::new(RefCell::new(kernel::Control::start(8192)));
+    let control: Rc<RefCell<kernel::Control>> = Rc::new(RefCell::new(kernel::Control::start()));
     task::spawn(async move {
         loop {
             let stream = TcpStream::accept(1381, 2048, 2048).await.unwrap();

runtime/src/kernel.rs

@@ -21,15 +21,14 @@ static CHANNEL_0TO1: Mutex<Option<sync_channel::Receiver<Message>>> = Mutex::new
 static CHANNEL_1TO0: Mutex<Option<sync_channel::Sender<Message>>> = Mutex::new(None);
 
 pub struct Control {
-    core1: Core1<Vec<u32>>,
+    core1: Core1,
     pub tx: sync_channel::Sender<Message>,
     pub rx: sync_channel::Receiver<Message>,
 }
 
 impl Control {
-    pub fn start(stack_size: usize) -> Self {
+    pub fn start() -> Self {
-        let stack = vec![0; stack_size / 4];
+        let core1 = Core1::start();
-        let core1 = Core1::start(stack);
 
         let (core0_tx, core1_rx) = sync_channel(4);
         let (core1_tx, core0_rx) = sync_channel(4);

szl/link.x

@@ -1,7 +1,5 @@
 ENTRY(_boot_cores);
 
-STACK_SIZE = 0x8000;
-
 /* Provide some defaults */
 PROVIDE(Reset = _boot_cores);
 PROVIDE(UndefinedInstruction = Reset);
@@ -38,21 +36,28 @@ SECTIONS
         *(.data .data.*);
     } > OCM
  
-    .bss (NOLOAD) : ALIGN(0x4000)
+    .bss (NOLOAD) : ALIGN(4)
     {
-        /* Aligned to 16 kB */
+        __bss_start = .;
         KEEP(*(.bss.l1_table));
         *(.bss .bss.*);
         . = ALIGN(4);
+        __bss_end = .;
     } > OCM
-    __bss_start = ADDR(.bss);
-    __bss_end = ADDR(.bss) + SIZEOF(.bss);
 
-    .stack (NOLOAD) : ALIGN(0x1000) {
+    .stack1 (NOLOAD) : ALIGN(8)
-      . += STACK_SIZE;
+    {
+        __stack1_end = .;
+        . += 0x4000;
+        __stack1_start = .;
+    } > OCM
+
+    .stack0 (NOLOAD) : ALIGN(8)
+    {
+        __stack0_end = .;
+        . += 0x4000;
+        __stack0_start = .;
     } > OCM
-    __stack_end = ADDR(.stack);
-    __stack_start = ADDR(.stack) + SIZEOF(.stack);
 
     /DISCARD/ :
     {

szl/src/main.rs

@@ -14,8 +14,6 @@ use libboard_zynq::{
 use libsupport_zynq::{boot, logger};
 
 
-static mut STACK_CORE1: [u32; 512] = [0; 512];
-
 extern "C" {
     fn unlzma_simple(buf: *const u8, in_len: i32,
                      output: *mut u8,
@@ -49,8 +47,7 @@ pub fn main_core0() {
     if result < 0 {
         error!("decompression failed");
     } else {
-        let core1_stack = unsafe { &mut STACK_CORE1[..] };
+        boot::Core1::start();
-        boot::Core1::start(core1_stack);
         info!("executing payload");
         unsafe {
             (mem::transmute::<*mut u8, fn()>(ddr.ptr::<u8>()))();