frameline GW: add buffer to improve timinig

This commit is contained in:
morgan 2025-01-10 13:02:55 +08:00
parent f70f4ad93a
commit 11925a3356

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@ -654,6 +654,7 @@ class ROI_Pipeline(Module):
# NOTE: TapGeo other than 1X-1Y are not supported # NOTE: TapGeo other than 1X-1Y are not supported
# TODO: match pixel and see whether the it matches the supported ones (via csr perhaps?) # TODO: match pixel and see whether the it matches the supported ones (via csr perhaps?)
self.submodules.buffer = buffer = Buffer(word_layout_dchar) # to improve timing from broadcaster
self.submodules.crc_checker = crc_checker = CXPCRC32_Checker() self.submodules.crc_checker = crc_checker = CXPCRC32_Checker()
self.submodules.header_decoder = header_decoder = Frame_Header_Decoder() self.submodules.header_decoder = header_decoder = Frame_Header_Decoder()
self.submodules.deserializer = deserializer = Frame_Deserializer(res_width, pixel_size) self.submodules.deserializer = deserializer = Frame_Deserializer(res_width, pixel_size)
@ -664,7 +665,7 @@ class ROI_Pipeline(Module):
deserializer.x_size.eq(header_decoder.metadata.x_size), deserializer.x_size.eq(header_decoder.metadata.x_size),
] ]
self.pipeline = [crc_checker, header_decoder, deserializer] self.pipeline = [buffer, crc_checker, header_decoder, deserializer]
for s, d in zip(self.pipeline, self.pipeline[1:]): for s, d in zip(self.pipeline, self.pipeline[1:]):
self.comb += s.source.connect(d.sink) self.comb += s.source.connect(d.sink)
self.sink = self.pipeline[0].sink self.sink = self.pipeline[0].sink