morgan
/
artiq-zynq
forked from M-Labs/artiq-zynq
1
0
Fork 0
Code Pull Requests Activity

cxp downconn fw: add QPLL setup

This commit is contained in:
morgan 2024-07-29 17:23:00 +08:00
parent ccd3e6618a
commit 0e4fb4cbfe
1 changed files with 13 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
src/libboard_artiq/src/cxp_downconn.rs
View File

@ -36,6 +36,13 @@ pub fn main(timer: &mut GlobalTimer) {
[1, 1, 1, 0], [1, 1, 1, 0],
]; ];
// STEP 1: reset QPLL
csr::cxp::downconn_qpll_reset_write(1);
info!("waiting for QPLL/CPLL to lock...");
while csr::cxp::downconn_qpll_locked_read() != 1 {}
info!("QPLL locked");
// STEP 2: setup tx/rx gtx
csr::cxp::downconn_data_0_write(DATA[0][0]); csr::cxp::downconn_data_0_write(DATA[0][0]);
csr::cxp::downconn_data_1_write(DATA[0][1]); csr::cxp::downconn_data_1_write(DATA[0][1]);
csr::cxp::downconn_data_2_write(DATA[0][2]); csr::cxp::downconn_data_2_write(DATA[0][2]);
@ -50,9 +57,13 @@ pub fn main(timer: &mut GlobalTimer) {
csr::cxp::downconn_tx_start_init_write(1); csr::cxp::downconn_tx_start_init_write(1);
csr::cxp::downconn_rx_start_init_write(1); csr::cxp::downconn_rx_start_init_write(1);
info!("waiting for QPLL/CPLL to lock..."); info!("waiting for tx setup...");
timer.delay_us(50_000); timer.delay_us(50_000);
info!("tx_phaligndone = {} ", csr::cxp::downconn_txinit_phaligndone_read(),); info!(
"tx_phaligndone = {} | rx_phaligndone = {}",
csr::cxp::downconn_txinit_phaligndone_read(),
csr::cxp::downconn_rxinit_phaligndone_read(),
);
// enable txdata tranmission thought MGTXTXP, required by PMA loopback // enable txdata tranmission thought MGTXTXP, required by PMA loopback
csr::cxp::downconn_txenable_write(1); csr::cxp::downconn_txenable_write(1);