diff --git a/src/libboard_artiq/src/cxp_upconn.rs b/src/libboard_artiq/src/cxp_upconn.rs index 094a672..f3bcbe9 100644 --- a/src/libboard_artiq/src/cxp_upconn.rs +++ b/src/libboard_artiq/src/cxp_upconn.rs @@ -8,13 +8,13 @@ pub fn trigger_ack_test(timer: &mut GlobalTimer) { let mut pak_arr: [u8; LEN] = [0; LEN]; unsafe { - csr::cxp::txtrig_ack_write(1); // send IO ack + csr::cxp::upconn_ack_write(1); // send IO ack let mut i: usize = 0; - while csr::cxp::txtrig_dout_valid_read() == 1 { - pak_arr[i] = csr::cxp::txtrig_dout_pak_read(); + while csr::cxp::upconn_trig_ack_dout_valid_read() == 1 { + pak_arr[i] = csr::cxp::upconn_trig_ack_dout_pak_read(); // println!("received {:#04X}", pak_arr[i]); - csr::cxp::txtrig_inc_write(1); + csr::cxp::upconn_trig_ack_inc_write(1); i += 1; } @@ -46,23 +46,23 @@ pub fn pipeline_test(timer: &mut GlobalTimer) { unsafe { // eop = 1 (End of packet) at the last data input - csr::cxp::upconn_tx_command_din_len_write(arr.len() as u8); - csr::cxp::upconn_tx_command_packet_type_write(0x02); // read control command + csr::cxp::upconn_command_din_len_write(arr.len() as u8); + csr::cxp::upconn_command_packet_type_write(0x02); // read control command for a in arr.iter() { - while csr::cxp::upconn_tx_command_din_ready_read() == 0 {} + while csr::cxp::upconn_command_din_ready_read() == 0 {} // println!("{:#04X}", *a); - csr::cxp::upconn_tx_command_din_data_write(*a); + csr::cxp::upconn_command_din_data_write(*a); } // wait for pipelining timer.delay_us(1); let mut i: usize = 0; - while csr::cxp::upconn_dout_valid_read() == 1 { - pak_arr[i] = csr::cxp::upconn_dout_pak_read(); + while csr::cxp::upconn_command_dout_valid_read() == 1 { + pak_arr[i] = csr::cxp::upconn_command_dout_pak_read(); // println!("received {:#04X}", pak_arr[i]); - csr::cxp::upconn_inc_write(1); + csr::cxp::upconn_command_inc_write(1); i += 1; }