diff --git a/src/gateware/cxp.py b/src/gateware/cxp.py
index 68543c3..41a0f3b 100644
--- a/src/gateware/cxp.py
+++ b/src/gateware/cxp.py
@@ -320,7 +320,7 @@ class TX_Pipeline(Module, AutoCSR):
 class CXP_Frame_Pipeline(Module, AutoCSR):
     # optimal stream packet size is 2 KiB - Section 9.5.2 (CXP-001-2021)
     # largest x/y pixel size supported by frame header are 24 bits
-    def __init__(self, rx_pipelines, pmod_pads, roi_engine_count=1, res_width=24, count_width=31, packet_size=16384):
+    def __init__(self, rx_pipelines, pmod_pads, roi_engine_count=1, res_width=16, count_width=31, packet_size=16384):
         n_downconn = len(rx_pipelines)
         assert n_downconn > 0
         assert count_width <= 31