Block a user
mikelam
renamed repository from 2022-03-12 23:21:29 +08:00
Syrostan-Leveler-Ordering-Guide
to sinara-hw/Syrostan-Lever-Ordering-Guide
7a0fa5ce04
add TPS2590 to make 3v3_MP output controllable and limit current; update 12v output current limit to 1A
b3427d68c6
use 2x17 connector for FPGA_IO and 2x12 connector for Analog; use FPGA GBIN pins for FSMC and HSADC clocks
34042d1c59
add eem0 and eem2 port support; eem0 input working
cf76348432
EEM output working
d64ae0e652
add time stamp (in ns) for plotting; ADC working at 80MHz
a082a2bd0d
use UART to transmit data out and plot wave using python for HSADC performance testing (working well @75MHz)
5d1c7c4d51
FPGA BRAM working
7b51c26a0e
add eem0 and eem2 port support; eem0 input working
46d4c4358a
EEM output working
f635dd3e90
add time stamp (in ns) for plotting; ADC working at 80MHz
ba31098bfd
use UART to transmit data out and plot wave using python for HSADC performance testing (working well @75MHz)
6477f0d93b
FPGA BRAM working