ljstephenson
  • Joined on 2022-03-23
ljstephenson opened issue M-Labs/artiq-zynq#188 2022-04-27 06:01:46 +08:00
ZC706/QC2 AD9914 DDS initialization causes hang/crash
ljstephenson commented on issue M-Labs/artiq-zynq#185 2022-04-16 06:37:17 +08:00
zc706 nist_qc2: SPI3 MOSI not working

Ah: I think P28 should be R28 here: 7507a2bb16/migen/build/platforms/zc706.py (L133)

See Page 69, Col.…

ljstephenson opened issue M-Labs/artiq-zynq#185 2022-04-16 06:20:20 +08:00
zc706 nist_qc2: SPI3 MOSI not working
ljstephenson commented on issue M-Labs/artiq-zynq#179 2022-04-15 23:38:49 +08:00
zc706 satellite can't have boot file reloaded to SD

Oh I see - I was under the impression that the coredevice would try to fetch its bitstream from a server, rather than providing a server that waits until a client supplies the bitstream. Makes sense!

ljstephenson commented on issue M-Labs/artiq-zynq#179 2022-04-14 09:25:47 +08:00
zc706 satellite can't have boot file reloaded to SD

Is setting up a netboot server reasonably simple? How does this differentiate if you have e.g. both a master and satellite using netboot?

Agreed that being able to do it via DRTIO seems very nice…

ljstephenson commented on issue M-Labs/artiq-zynq#179 2022-04-14 05:34:23 +08:00
zc706 satellite can't have boot file reloaded to SD

Reiterating that this very low on the priority list, but to summarise my thoughts and how I understand things (which may well be wrong):

  • Rewriting Kasli gateware remotely is easy via JTAG over…
ljstephenson commented on issue M-Labs/artiq-zynq#181 2022-04-14 04:50:03 +08:00
zc706 networking never comes up if RTIO PLL lock fails

There were a couple of unrelated issues - I stumbled into this using the DRTIO master zc706 gateware that would not lock to any clock, even when using a known good clock input.

It also turned out…

ljstephenson opened issue M-Labs/artiq-zynq#181 2022-04-07 02:16:18 +08:00
zc706 networking never comes up if RTIO PLL lock fails
ljstephenson opened issue M-Labs/artiq-zynq#180 2022-04-07 02:06:41 +08:00
Regression: RTIO PLL fails to lock on with external clock on zc706 drtio master
ljstephenson opened issue M-Labs/artiq-zynq#179 2022-04-02 07:29:49 +08:00
zc706 satellite can't have boot file reloaded to SD