3b7fbdb2be
pcb: Update PN and properties of symbols
8b3d5d8e44
sch: Not to include TPs in BOM. Add prod comments
83bd5e9a03
Front Panel: Relocate markings to diff layers
cc64790270
pcb: relocate programming hdrs
56ef8302a7
sch: Correct Front Panel Kit MRF/PN & Value typo
08133e5e95
sch, pcb: Add TAN Caps to all LT304x SET Pin
74524b70e4
Scripts: Grab correct KICAD7_3DMODEL_DIR now
13720b3ccc
Reassign Reference Designators for all Symbols
f558f62313
sch: Add Mounting Screw Symbol and MFR/PN
Kirdy Revision 0_3
I meant using tantalum caps at the SET pin of LT304x. This is the most sensitive pin. LT304x has quite good PSRR, but every noise on SET pin is amplified and present at the output.
Thank…
a8ac943190
Cleanup and Update Modification Date
2612acc9f7
Scripts: Comment Filed is included in the BOM
06a00befeb
3D: Update 3D models of KIrdy LD Adapter
1b7940871b
sch, pcb: Add 12V & Mounting holes to MCU EXT HDR
2b96bdd7c9
sch, pcb: Update MFR/PN & layout for both variants
955018a9ce
Update footprints, 3D models of SMA & HDRs, M3 MHs
3c61d5dfea
Add 3D Model & update footprint for Laser Mount
77d72b538c
Scripts: BOM Generation includes Comment field
fbe79e7247
Cleanup and Update Modification Date
bc2a44af86
Scripts: Comment Filed is included in the BOM
347cc482f9
3D: Update 3D models of KIrdy LD Adapter
395433176c
sch, pcb: Add 12V & Mounting holes to MCU EXT HDR
83506fd3c6
sch, pcb: add tantalum C0G Caps for 8V out LT3045
sch/pcb review
I meant strange connections of GND in voltage reference chip
The layout was drawn with reference to the sample layout in the datasheet. ![image](/attachments/fc8d788b-c544-46b4-ae86-8a0d75484…
sch/pcb review
Thank you for your feedback. Working on a updated swiftly.
reference grounding is done on purpose?
Yes. It is done on purpose for a continuous reference plane for critical analog…
47a30da9b1
Port front panel markings design to Kicad
de7c27c21f
sch, pcb: Add mounting holes for Kirdy LD Adapter
Revise the Kirdy Laser Driver Adapter for Kirdy Rev0_3
ecc8b4f334
sch, pcb: Modify Bias-T Network
054d20deb2
Add Production Files Generation Scripts
7d53ae4d32
Update the adapter design
c294805dac
sch, pcb: Add mounting holes for Kirdy LD Adapter
41db8612c0
pcb: relocate switches for better accessibility
de3e034c7a
Add Front Panel, Kirdy LD Adapter 3D models
9f3793c8fb
pcb: Add 3D Models
0b99a8f119
sch, pcb: Correct MFR/PN and optimize BOM
7c72afe55f
Remove old production files
cd679cf0da
sch: Update Title Block Info
35da9f8c58
scripts: Add scripts to generate production files
[Rev0_2] Thermostat: TEC Polarity is drawn incorrectly in schematics
[Rev0_2] Thermostat: Wrong MFR_PN for TEC Current Sense Resistor
kasli-soc & zc706: Fix GTX Clock Path during Initialization
the additional delay added in commit dc08c382a2 is rolled back
Do you think we could roll back the delay for both runtime and satman with these changes? Hard to say if it actually fixes…