2019-03-07 23:27:33 +08:00
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#![no_std]
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#![no_main]
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2019-03-13 05:52:39 +08:00
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// Enable returning `!`
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#![feature(never_type)]
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2019-03-07 23:27:33 +08:00
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#[allow(unused_extern_crates)]
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2019-03-12 01:23:52 +08:00
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extern crate panic_abort;
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2019-03-07 23:27:33 +08:00
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2019-03-12 01:23:52 +08:00
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use cortex_m::asm::wfi;
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2019-03-07 23:27:33 +08:00
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use cortex_m_rt::entry;
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2019-03-12 01:23:52 +08:00
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use embedded_hal::watchdog::{WatchdogEnable, Watchdog};
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use stm32f4xx_hal::{
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rcc::RccExt,
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gpio::GpioExt,
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watchdog::IndependentWatchdog,
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time::U32Ext,
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stm32::{CorePeripherals, Peripherals},
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};
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2019-03-13 05:52:39 +08:00
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use smoltcp::time::Instant;
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2019-03-12 01:23:52 +08:00
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use core::fmt::Write;
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use cortex_m_semihosting::hio;
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mod adc_input;
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2019-03-13 05:52:39 +08:00
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mod net;
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mod server;
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use server::Server;
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2019-03-15 01:13:25 +08:00
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mod timer;
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const OUTPUT_INTERVAL: u32 = 1000;
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2019-03-07 23:27:33 +08:00
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#[entry]
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fn main() -> ! {
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2019-03-12 01:23:52 +08:00
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let mut stdout = hio::hstdout().unwrap();
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2019-03-13 05:52:39 +08:00
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writeln!(stdout, "adc2tcp").unwrap();
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2019-03-12 01:23:52 +08:00
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let mut cp = CorePeripherals::take().unwrap();
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2019-03-13 05:52:39 +08:00
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cp.SCB.enable_icache();
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cp.SCB.enable_dcache(&mut cp.CPUID);
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2019-03-12 01:23:52 +08:00
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let dp = Peripherals::take().unwrap();
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stm32_eth::setup(&dp.RCC, &dp.SYSCFG);
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2019-03-15 01:13:25 +08:00
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let clocks = dp.RCC.constrain()
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2019-03-12 01:23:52 +08:00
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.cfgr
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2019-03-15 01:11:07 +08:00
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.sysclk(84.mhz())
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2019-03-12 01:23:52 +08:00
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.hclk(84.mhz())
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2019-03-15 01:11:07 +08:00
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.pclk1(16.mhz())
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.pclk2(32.mhz())
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2019-03-12 01:23:52 +08:00
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.freeze();
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let mut wd = IndependentWatchdog::new(dp.IWDG);
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wd.start(8000u32.ms());
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wd.feed();
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let gpioa = dp.GPIOA.split();
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let gpiob = dp.GPIOB.split();
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let gpioc = dp.GPIOC.split();
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let gpiog = dp.GPIOG.split();
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2019-03-13 05:52:39 +08:00
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writeln!(stdout, "ADC init").unwrap();
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adc_input::setup(&mut cp.NVIC, dp.ADC1, gpioa.pa3);
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writeln!(stdout, "Eth setup").unwrap();
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2019-03-12 01:23:52 +08:00
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stm32_eth::setup_pins(
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gpioa.pa1, gpioa.pa2, gpioa.pa7, gpiob.pb13, gpioc.pc1,
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gpioc.pc4, gpioc.pc5, gpiog.pg11, gpiog.pg13
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);
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2019-03-15 01:13:25 +08:00
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writeln!(stdout, "Timer setup").unwrap();
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timer::setup(cp.SYST, clocks);
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2019-03-13 05:52:39 +08:00
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writeln!(stdout, "Net startup").unwrap();
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net::run(&mut cp.NVIC, dp.ETHERNET_MAC, dp.ETHERNET_DMA, |net| {
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let mut server = Server::new(net);
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2019-03-12 01:23:52 +08:00
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2019-03-15 01:13:25 +08:00
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let mut last_output = 0_u32;
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2019-03-13 05:52:39 +08:00
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loop {
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2019-03-15 01:13:25 +08:00
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let now = timer::now().0;
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let instant = Instant::from_millis(now as i64);
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server.poll(instant);
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if now - last_output >= OUTPUT_INTERVAL {
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let adc_value = adc_input::read();
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adc_value.map(|adc_value| {
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write!(server, "t={},pa3={}\r\n", now, adc_value).unwrap();
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});
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last_output = now;
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}
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2019-03-12 01:23:52 +08:00
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2019-03-13 05:52:39 +08:00
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// Update watchdog
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wd.feed();
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// Wait for interrupts
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// if net.is_pending() {
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wfi();
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// }
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}
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})
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2019-03-07 23:27:33 +08:00
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}
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