forked from sinara-hw/assembly
Fix urukuls sync misleading information
Signed-off-by: Egor Savkin <es@m-labs.hk>
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@ -24,13 +24,11 @@ Check if [SUServo](./suservo.md) is enabled/disabled respective to customer need
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### Synchronization
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Synchronization option in the JSON refers to the phase synchronization between the outputs, and can be used only on AD9910 variants and
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only with 125 MHz clock source provided from Kasli/Kasli-SoC (may be relayed through the Clocker board).
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The phase sync works only within one Urukul board, though the phase shift between Urukuls may be [predictable](https://github.com/m-labs/artiq/issues/1692#issuecomment-994439589).
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Even though it is widely-desirable feature, there are drawbacks of this preventing from enabling by default:
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1. The resulting signal is more noisy, which can be observed [previously](https://github.com/sinara-hw/Urukul/issues/64).
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2. Phase sync process takes time and sometimes fails
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3. ???
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Phase synchronization enables phase control from Kasli/Kasli-SoC with an absolute phase reference, i.e. you can use the phase control API in the coredevice driver.
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Without synchronization the phase between Urukuls will not drift, but it can change across reboots, and the phase control API cannot be used.
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Synchronization requires Kasli and Urukul to be clocked from the same oscillator with <<1ns noise, otherwise the synchronization may fail, and that's
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why this feature is disabled by default.
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There is no intrinsic impact on Urukul output phase noise and the synchronization process is quick and reliable when done correctly.
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## Testing
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