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Add instruction for Mirny

Signed-off-by: Egor Savkin <es@m-labs.hk>
This commit is contained in:
Egor Savkin 2023-02-06 17:05:51 +08:00
parent 3277359e7a
commit eddde75739
5 changed files with 50 additions and 2 deletions

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# Summary # Summary
- [Build and test firmware](./build_test_firmware.md) - [Build and test firmware](./build_test_firmware.md)
- [Sinara 4624 AWG Phaser (Upconverter)](./hw/phaser_upconverter.md) - [Hardware](./hw/hardware.md)
- [Sinara 4624 AWG Phaser (Upconverter)](./hw/phaser_upconverter.md)
- [Sinara 4456 synthesizer Mirny](./hw/mirny.md)

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# Hardware
In this section you will find instructions on testing the hardware.
If you didn't find one for your hardware, feel free to compose and add your instruction.

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# Sinara 4456 synthesizer Mirny
## JSON
```json
{
"type": "mirny",
"ports": [<port num>]
}
```
## Testing
```text
*** Testing Mirny PLLs.
Initializing CPLDs...
mirny0_cpld...
...done
All mirny channels active.
Frequencies:
mirny0_ch0 1000MHz
mirny0_ch0 info: {'f_outA': 1000000000.0, 'f_outB': 8000000000, 'output_divider': 4, 'f_vco': 4000000000, 'pll_n': 40, 'pll_frac1': 0, 'pll_frac2': 0, 'pll_mod2': 1, 'prescaler': '4/5', 'sysclk': 100000000.0, 'ref_doubler': False, 'ref_divider': False, 'ref_counter': 1, 'f_pfd': 100000000}
mirny0_ch1 1100MHz
mirny0_ch1 info: {'f_outA': 1100000000.0, 'f_outB': 8800000000, 'output_divider': 4, 'f_vco': 4400000000, 'pll_n': 44, 'pll_frac1': 0, 'pll_frac2': 0, 'pll_mod2': 1, 'prescaler': '4/5', 'sysclk': 100000000.0, 'ref_doubler': False, 'ref_divider': False, 'ref_counter': 1, 'f_pfd': 100000000}
mirny0_ch2 1200MHz
mirny0_ch2 info: {'f_outA': 1200000000.0, 'f_outB': 9600000000, 'output_divider': 4, 'f_vco': 4800000000, 'pll_n': 48, 'pll_frac1': 0, 'pll_frac2': 0, 'pll_mod2': 1, 'prescaler': '4/5', 'sysclk': 100000000.0, 'ref_doubler': False, 'ref_divider': False, 'ref_counter': 1, 'f_pfd': 100000000}
mirny0_ch3 1300MHz
mirny0_ch3 info: {'f_outA': 1300000000.0, 'f_outB': 10400000000, 'output_divider': 4, 'f_vco': 5200000000, 'pll_n': 52, 'pll_frac1': 0, 'pll_frac2': 0, 'pll_mod2': 1, 'prescaler': '4/5', 'sysclk': 100000000.0, 'ref_doubler': False, 'ref_divider': False, 'ref_counter': 1, 'f_pfd': 100000000}
```
After running `artiq_sinara_test`:
1. Install gqrx `nix-shell -p gqrx`
2. Connect bladeRF via USB cable only
3. Run gqrx and choose `BladeRF #<number>...`
4. Default settings
5. When gqrx loaded, start DSP processing with frequency at mirnyN_chM freq
6. Connect the probe through attenuator to the Mirny's port
7. You should see significant signal emission on choosen freq compared to nearby freqs (see image below)
8. Repeat 5-7 for every channel
![](../img/mirny_gqrx.png)

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3. Run gqrx and choose `BladeRF #<number>...` 3. Run gqrx and choose `BladeRF #<number>...`
4. Input rate 30000000, other settings are default 4. Input rate 30000000, other settings are default
5. When gqrx loaded, start DSP processing with frequency near 2.875 GHz + frequencies from `artiq_sinara_test` in `Receiver Options` 5. When gqrx loaded, start DSP processing with frequency near 2.875 GHz + frequencies from `artiq_sinara_test` in `Receiver Options`
6. Connect the probe with adjusted resistance (???) to the Phaser's ports 6. Connect the probe through attenuator to the Phaser's ports
7. You should see 5 tones on `artiq_sinara_test`'s frequencies, like on the picture below 7. You should see 5 tones on `artiq_sinara_test`'s frequencies, like on the picture below
![](../img/phaser_upconverter_gqrx.png) ![](../img/phaser_upconverter_gqrx.png)

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