ad5680: rm time.sleep for sync signal

- the time used for prep-ing the DMA for SPI TX is longer than the
    specified minimum sync high time (33 ns)

src/thermostat/ad5680.rs

@@ -9,7 +9,7 @@ use stm32f4xx_hal::{dma::{config::DmaConfig, MemoryToPeripheral, Stream3, Transf
                     spi,
                     spi::*};
 
-use crate::{addr_of_mut, device::sys_timer::sleep};
+use crate::addr_of_mut;
 
 const ARRAY_SIZE: usize = 3;
 type SpiDma = DMA_Transfer<Stream3<pac::DMA2>, 3, Tx<SPI1>, MemoryToPeripheral, &'static mut [u8; ARRAY_SIZE]>;
@@ -72,11 +72,8 @@ impl Dac {
         if unsafe { DMA_TRANSFER_COMPLETE } {
             // pulse sync to start a new transfer. leave sync idle low
             // afterwards to save power as recommended per datasheet.
+            // must be high for >= 33 ns.
             let _ = self.sync.set_high();
-            // must be high for >= 33 ns
-            sleep(1);
-            let _ = self.sync.set_low();
-
             static mut TRANSFER: Option<SpiDma> = None;
             let transfer = unsafe {
                 TRANSFER
@@ -87,6 +84,7 @@ impl Dac {
             unsafe {
                 LOCAL_BUFFER = [(value >> 14) as u8, (value >> 6) as u8, (value << 2) as u8];
                 DMA_TRANSFER_COMPLETE = false;
+                let _ = self.sync.set_low();
                 let previous_buffer = transfer
                     .next_transfer(addr_of_mut!(LOCAL_BUFFER).as_mut().unwrap())
                     .unwrap();