forked from M-Labs/kirdy
DacVFb is changed to PC3 for rev0_2 prototype
- This requires a circuit change to connect it to the PoE_PWR_SRC through a 1.6k Ohm and 100nF LPF
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@ -112,7 +112,9 @@ pub fn setup(
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shdn: gpioa.pa5.into_push_pull_output(),
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shdn: gpioa.pa5.into_push_pull_output(),
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vref_pin: gpioa.pa6.into_analog(),
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vref_pin: gpioa.pa6.into_analog(),
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itec_pin: gpiob.pb1.into_analog(),
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itec_pin: gpiob.pb1.into_analog(),
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dac_feedback_pin: gpioc.pc0.into_analog(),
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// Fixme: Flywire is added to Rev0_2 prototype. In Rev0_3, it is connected to PC0
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//dac_feedback_pin: gpioc.pc0.into_analog(),
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dac_feedback_pin: gpioc.pc3.into_analog(),
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vtec_pin: gpiob.pb0.into_analog(),
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vtec_pin: gpiob.pb0.into_analog(),
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max_v: max_v0,
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max_v: max_v0,
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max_i_pos: max_i_pos0,
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max_i_pos: max_i_pos0,
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@ -96,7 +96,9 @@ impl ChannelPins for Channel0 {
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type ShdnPin = PA5<Output<PushPull>>;
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type ShdnPin = PA5<Output<PushPull>>;
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type VRefPin = PA6<Analog>;
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type VRefPin = PA6<Analog>;
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type ItecPin = PB1<Analog>;
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type ItecPin = PB1<Analog>;
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type DacFeedbackPin = PC0<Analog>;
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// Fixme: Flywire is added to Rev0_2 prototype. In Rev0_3, it is connected to PC0
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//type DacFeedbackPin = PC0<Analog>;
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type DacFeedbackPin = PC3<Analog>;
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type VTecPin = PB0<Analog>;
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type VTecPin = PB0<Analog>;
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type MaxVPin = PwmChannel<TIM4, 1>;
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type MaxVPin = PwmChannel<TIM4, 1>;
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type MaxIPosPin = PwmChannel<TIM4, 2>;
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type MaxIPosPin = PwmChannel<TIM4, 2>;
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@ -315,9 +317,7 @@ impl MAX1968 {
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}
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}
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pub fn get_dac_vfb(&mut self) -> ElectricPotential {
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pub fn get_dac_vfb(&mut self) -> ElectricPotential {
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// Fixme: Rev0_2 does not have this feature
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self.adc_read(AdcReadTarget:: DacVfb, 1)
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unimplemented!()
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//self.adc_read(AdcReadTarget:: DacVfb, 1)
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}
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}
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pub fn get_tec_i(&mut self) -> ElectricCurrent {
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pub fn get_tec_i(&mut self) -> ElectricCurrent {
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