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Update rust, stm32-eth, hal, smoltcp versions

This commit is contained in:
linuswck 2024-03-22 17:44:06 +08:00
parent f8abfd4300
commit af68b0e90a
13 changed files with 249 additions and 144 deletions

205
Cargo.lock generated
View File

@ -177,9 +177,9 @@ checksum = "7059fff8937831a9ae6f0fe4d658ffabf58f2ca96aa9dec1c889f936f705f216"
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version = "0.1.1" version = "0.2.1"
source = "registry+https://github.com/rust-lang/crates.io-index" source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "db75519b86287f12dcf0d171c7cf4ecc839149fe9f3b720ac4cfce52959e1dfe" checksum = "c233fa6eb0417df4fa34aef190dfe725497a8a8120310d360e0c91653ce4f792"
dependencies = [ dependencies = [
"embedded-hal 0.2.7", "embedded-hal 0.2.7",
"nb 0.1.3", "embedded-io",
"nb 1.1.0",
"usb-device", "usb-device",
] ]

View File

@ -15,21 +15,21 @@ default-target = "thumbv7em-none-eabihf"
[dependencies] [dependencies]
panic-halt = "0.2.0" panic-halt = "0.2.0"
cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } cortex-m = { version = "0.7.7", features = ["critical-section-single-core"] }
cortex-m-rt = { version = "0.7.1", features = ["device"] } cortex-m-rt = { version = "0.7.3", features = ["device"] }
cortex-m-semihosting = "0.5.0" cortex-m-semihosting = "0.5.0"
log = "0.4.17" log = "0.4.17"
bare-metal = "1" bare-metal = "1"
nb = "1" nb = "1"
cortex-m-log = { version = "0.7.0", features = ["log-integration", "semihosting"] } cortex-m-log = { version = "0.7.0", features = ["log-integration", "semihosting"] }
stm32f4xx-hal = { version = "0.14.0", features = ["rt", "stm32f407", "usb_fs"] } stm32f4xx-hal = { version = "0.20.0", features = ["stm32f407", "otg-fs", "usb_fs"] }
stm32-eth = { version = "0.5.2", features = ["stm32f407", "smoltcp-phy", "smoltcp"] } stm32-eth = { version = "0.6.0", features = ["stm32f407", "smoltcp-phy", "smoltcp"] }
ieee802_3_miim = "0.8.0" ieee802_3_miim = "0.8.0"
smoltcp = { version = "0.10.0", default-features = false, features = ["proto-ipv4", "socket-tcp", "log", "medium-ethernet"] } smoltcp = { version = "0.11.0", default-features = false, features = ["proto-ipv4", "socket-tcp", "log", "medium-ethernet"] }
uom = { version = "0.30", default-features = false, features = ["autoconvert", "si", "f32", "use_serde"] } uom = { version = "0.30", default-features = false, features = ["autoconvert", "si", "f32", "use_serde"] }
num-traits = { version = "0.2.15", default-features = false, features = ["libm"] } num-traits = { version = "0.2.15", default-features = false, features = ["libm"] }
usb-device = "0.2.9" usb-device = "0.3.2"
usbd-serial = "0.1.1" usbd-serial = "0.2.1"
fugit = "0.3.6" fugit = "0.3.6"
rtt-target = { version = "0.3.1", features = ["cortex-m"] } rtt-target = { version = "0.3.1", features = ["cortex-m"] }
miniconf = "0.9.0" miniconf = "0.9.0"

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@ -8,8 +8,8 @@
let let
pkgs = import nixpkgs { system = "x86_64-linux"; overlays = [ (import mozilla-overlay) ]; }; pkgs = import nixpkgs { system = "x86_64-linux"; overlays = [ (import mozilla-overlay) ]; };
rustManifest = pkgs.fetchurl { rustManifest = pkgs.fetchurl {
url = "https://static.rust-lang.org/dist/2023-02-09/channel-rust-stable.toml"; url = "https://static.rust-lang.org/dist/2024-03-21/channel-rust-stable.toml";
sha256 = "4b8740ee77b62291471be1278d77e8826ab01b20c54915859c9f1ccb8299af59"; sha256 = "faccaa01dda45fc2956bcfd4da0cf76e52104d3b1862ddd4eb7c4159a18e49cf";
}; };
targets = [ targets = [

View File

@ -39,7 +39,7 @@ impl StoreBackend for FlashBackend {
} }
fn backup_space(&self) -> &'static mut [u8] { fn backup_space(&self) -> &'static mut [u8] {
unsafe { &mut BACKUP_SPACE } unsafe { BACKUP_SPACE.as_mut() }
} }
} }

View File

@ -7,6 +7,7 @@ use crate::thermostat::ad7172;
use crate::net::net::EthernetMgmtPins; use crate::net::net::EthernetMgmtPins;
use crate::device::hw_rev::{HWRev, HwRevPins}; use crate::device::hw_rev::{HWRev, HwRevPins};
use stm32_eth::EthPins; use stm32_eth::EthPins;
use stm32f4xx_hal::gpio::alt::otg_fs::{Dm, Dp};
use stm32f4xx_hal::{ use stm32f4xx_hal::{
gpio::{gpioa::*, gpiob::*, gpioc::*, GpioExt, Input, Speed}, gpio::{gpioa::*, gpiob::*, gpioc::*, GpioExt, Input, Speed},
otg_fs::USB, otg_fs::USB,
@ -16,7 +17,7 @@ use stm32f4xx_hal::{
}, },
rcc::Clocks, rcc::Clocks,
spi::{NoMiso, Spi}, spi::{NoMiso, Spi},
timer::pwm::PwmExt, timer::{Channel1, Channel2, Channel3, pwm::PwmExt}
}; };
pub type EthernetPins = pub type EthernetPins =
@ -67,8 +68,8 @@ pub fn setup(
usb_global: otg_fs_global, usb_global: otg_fs_global,
usb_device: otg_fs_device, usb_device: otg_fs_device,
usb_pwrclk: otg_fs_pwrclk, usb_pwrclk: otg_fs_pwrclk,
pin_dm: gpioa.pa11.into_alternate(), pin_dm: Dm::PA11(gpioa.pa11.into_alternate()),
pin_dp: gpioa.pa12.into_alternate(), pin_dp: Dp::PA12(gpioa.pa12.into_alternate()),
hclk: clocks.hclk(), hclk: clocks.hclk(),
}; };
@ -94,7 +95,7 @@ pub fn setup(
spi2, spi2,
( (
gpiob.pb10.into_alternate(), gpiob.pb10.into_alternate(),
NoMiso {}, NoMiso::new(),
gpiob.pb15.into_alternate(), gpiob.pb15.into_alternate(),
), ),
max5719::SPI_MODE, max5719::SPI_MODE,
@ -113,9 +114,9 @@ pub fn setup(
}; };
let pwm_chs = ( let pwm_chs = (
gpiob.pb6.into_alternate(), Channel1::new(gpiob.pb6),
gpiob.pb7.into_alternate(), Channel2::new(gpiob.pb7),
gpiob.pb8.into_alternate(), Channel3::new(gpiob.pb8),
); );
let (max_i_neg0, max_v0, max_i_pos0) = let (max_i_neg0, max_v0, max_i_pos0) =
tim4.pwm_hz(pwm_chs, PWM_FREQ_KHZ.convert(), &clocks).split(); tim4.pwm_hz(pwm_chs, PWM_FREQ_KHZ.convert(), &clocks).split();
@ -126,7 +127,7 @@ pub fn setup(
spi1, spi1,
( (
gpiob.pb3.into_alternate(), gpiob.pb3.into_alternate(),
NoMiso {}, NoMiso::new(),
gpiob.pb5.into_alternate(), gpiob.pb5.into_alternate(),
), ),
ad5680::SPI_MODE, ad5680::SPI_MODE,

View File

@ -9,6 +9,8 @@ use stm32f4xx_hal::{
pac::{interrupt, Interrupt, NVIC}, pac::{interrupt, Interrupt, NVIC},
}; };
use usb_device::{ use usb_device::{
descriptor::lang_id,
device::StringDescriptors,
class_prelude::UsbBusAllocator, class_prelude::UsbBusAllocator,
prelude::{UsbDevice, UsbDeviceBuilder, UsbVidPid}, prelude::{UsbDevice, UsbDeviceBuilder, UsbVidPid},
}; };
@ -27,16 +29,19 @@ pub struct State {
impl State { impl State {
pub fn setup(usb: USB) { pub fn setup(usb: USB) {
unsafe { BUS.write(Bus::new(usb, &mut EP_MEMORY)) }; unsafe { BUS.write(Bus::new(usb, EP_MEMORY.as_mut())) };
let str_descriptor = StringDescriptors::new(lang_id::LangID::EN)
.manufacturer("M-Labs")
.product("Kirdy");
let bus = unsafe { BUS.assume_init_ref() }; let bus = unsafe { BUS.assume_init_ref() };
let serial = SerialPort::new(bus); let serial = SerialPort::new(bus);
let dev = UsbDeviceBuilder::new(bus, UsbVidPid(0x16c0, 0x27dd)) let dev = UsbDeviceBuilder::new(bus, UsbVidPid(0x16c0, 0x27dd))
.manufacturer("M-Labs")
.product("Kirdy")
.device_release(0x20) .device_release(0x20)
.self_powered(true) .self_powered(true)
.device_class(usbd_serial::USB_CLASS_CDC) .device_class(usbd_serial::USB_CLASS_CDC)
.strings(&[str_descriptor]).unwrap()
.build(); .build();
free(|_| unsafe { free(|_| unsafe {

View File

@ -1,9 +1,9 @@
use serde::{Deserialize, Serialize}; use serde::{Deserialize, Serialize};
use stm32f4xx_hal::{ use stm32f4xx_hal::{
gpio::{gpioa::*, gpiob::*, gpiod::*, Alternate, Input, Output, PushPull}, gpio::{gpioa::*, gpiob::*, gpiod::*, Input, Output, PushPull},
hal::{blocking::spi::Transfer, digital::{v2::OutputPin, v2::InputPin}}, hal::{spi::SpiBus, digital::{OutputPin, InputPin}},
pac::SPI2, pac::SPI2,
spi::{NoMiso, Spi, TransferModeNormal}, spi::Spi,
}; };
use uom::si::{ use uom::si::{
@ -26,7 +26,7 @@ pub trait ChannelPins {
type TerminationStatus: InputPin; type TerminationStatus: InputPin;
type Max5719Load: OutputPin; type Max5719Load: OutputPin;
type Max5719Cs: OutputPin; type Max5719Cs: OutputPin;
type Max5719Spi: Transfer<u8>; type Max5719Spi: SpiBus<u8>;
} }
pub struct LdCtrlPhy<C: ChannelPins> { pub struct LdCtrlPhy<C: ChannelPins> {
@ -44,7 +44,7 @@ impl ChannelPins for Channel0 {
type Max5719Spi = DacSpi; type Max5719Spi = DacSpi;
} }
type DacSpi = Spi<SPI2, (PB10<Alternate<5>>, NoMiso, PB15<Alternate<5>>), TransferModeNormal>; type DacSpi = Spi<SPI2>;
type DacCs = PD8<Output<PushPull>>; type DacCs = PD8<Output<PushPull>>;
type DacLoad = PB14<Output<PushPull>>; type DacLoad = PB14<Output<PushPull>>;

View File

@ -1,28 +1,32 @@
use stm32f4xx_hal::timer::{CounterUs, Event}; use stm32f4xx_hal::timer::{Event, Counter};
use stm32f4xx_hal::pac::{interrupt, Interrupt, TIM2}; use stm32f4xx_hal::pac::{interrupt, Interrupt, TIM2};
use stm32f4xx_hal::Listen;
use uom::si::{f32::ElectricCurrent, electric_current::ampere}; use uom::si::{f32::ElectricCurrent, electric_current::ampere};
use fugit::{TimerDurationU32, KilohertzU32}; use fugit::{TimerDurationU32, KilohertzU32};
use core::marker::PhantomData; use core::marker::PhantomData;
use log::debug;
pub struct LdCurrentOutCtrlTimer { pub struct LdCurrentOutCtrlTimer {
target_i: ElectricCurrent, target_i: ElectricCurrent,
now_i: ElectricCurrent, now_i: ElectricCurrent,
timer: CounterUs<TIM2>, timer: Counter<TIM2, FREQ>,
timeout: bool, timeout: bool,
} }
static mut LD_CURRENT_OUT_CTRL_TIMER: Option<LdCurrentOutCtrlTimer> = None; static mut LD_CURRENT_OUT_CTRL_TIMER: Option<LdCurrentOutCtrlTimer> = None;
pub const FREQ: u32 = 1000000;
/// This timer notifies the main loop to set the correct output current so that ld output current can ramp up/down slowly. /// This timer notifies the main loop to set the correct output current so that ld output current can ramp up/down slowly.
/// The current output slope is guaranteed to be larger but not necessarily equal to than the preset value. /// The current output slope is guaranteed to be larger but not necessarily equal to than the preset value.
impl LdCurrentOutCtrlTimer { impl LdCurrentOutCtrlTimer {
const TIME_STEP_MS: TimerDurationU32<1000000> = TimerDurationU32::from_rate(KilohertzU32::from_raw(1)); const TIME_STEP_MS: TimerDurationU32<FREQ> = TimerDurationU32::from_rate(KilohertzU32::from_raw(1));
const STEP_SIZE: ElectricCurrent = ElectricCurrent { const STEP_SIZE: ElectricCurrent = ElectricCurrent {
dimension: PhantomData, dimension: PhantomData,
units: PhantomData, units: PhantomData,
value: 0.0001, value: 0.0001,
}; };
pub fn setup(mut tim2: CounterUs<TIM2>) { pub fn setup(mut tim2: Counter<TIM2, FREQ>) {
tim2.start(LdCurrentOutCtrlTimer::TIME_STEP_MS).unwrap(); tim2.start(LdCurrentOutCtrlTimer::TIME_STEP_MS).unwrap();
unsafe { unsafe {
cortex_m::peripheral::NVIC::unmask(Interrupt::TIM2); cortex_m::peripheral::NVIC::unmask(Interrupt::TIM2);
@ -85,7 +89,10 @@ impl LdCurrentOutCtrlTimer {
pub fn clear_irq_flag() { pub fn clear_irq_flag() {
if let Some(ref mut ld_current_out_ctrl_timer ) = LdCurrentOutCtrlTimer::get() { if let Some(ref mut ld_current_out_ctrl_timer ) = LdCurrentOutCtrlTimer::get() {
ld_current_out_ctrl_timer.timer.clear_interrupt(Event::Update); match ld_current_out_ctrl_timer.timer.wait() {
Ok(_) => {}
Err(_) => {debug!("LD CTRL TIMER Interrupt is not present when clear_irq_flag() is called")}
}
} }
} }

View File

@ -1,7 +1,7 @@
use crate::device::sys_timer::sleep; use crate::device::sys_timer::sleep;
use fugit::MegahertzU32; use fugit::MegahertzU32;
use stm32f4xx_hal::{ use stm32f4xx_hal::{
hal::{blocking::spi::Transfer, digital::v2::OutputPin}, hal::{spi::SpiBus, digital::OutputPin},
spi, spi,
}; };
@ -14,13 +14,13 @@ pub const SPI_CLOCK_MHZ: MegahertzU32 = MegahertzU32::from_raw(21);
pub const MAX_VALUE: u32 = 0xFFFFF; pub const MAX_VALUE: u32 = 0xFFFFF;
pub struct Dac<SPI: Transfer<u8>, S1: OutputPin, S2:OutputPin> { pub struct Dac<SPI: SpiBus<u8>, S1: OutputPin, S2:OutputPin> {
spi: SPI, spi: SPI,
cs_n: S1, cs_n: S1,
load_n: S2, load_n: S2,
} }
impl<SPI: Transfer<u8>, S1: OutputPin, S2: OutputPin> Dac<SPI, S1, S2> { impl<SPI: SpiBus<u8>, S1: OutputPin, S2: OutputPin> Dac<SPI, S1, S2> {
pub fn new(spi: SPI, mut cs_n: S1, mut load_n: S2) -> Self { pub fn new(spi: SPI, mut cs_n: S1, mut load_n: S2) -> Self {
let _ = cs_n.set_high(); let _ = cs_n.set_high();
let _ = load_n.set_high(); let _ = load_n.set_high();
@ -30,7 +30,7 @@ impl<SPI: Transfer<u8>, S1: OutputPin, S2: OutputPin> Dac<SPI, S1, S2> {
fn write(&mut self, buf: &mut [u8]) -> Result<(), SPI::Error> { fn write(&mut self, buf: &mut [u8]) -> Result<(), SPI::Error> {
let _ = self.cs_n.set_low(); let _ = self.cs_n.set_low();
self.spi.transfer(buf)?; self.spi.write(buf)?;
let _ = self.cs_n.set_high(); let _ = self.cs_n.set_high();
sleep(1); sleep(1);
// must be high for >= 20 ns // must be high for >= 20 ns

View File

@ -9,6 +9,7 @@ mod laser_diode;
mod thermostat; mod thermostat;
mod net; mod net;
use core::ptr::addr_of_mut;
use device::{boot::bootup, log_setup, sys_timer}; use device::{boot::bootup, log_setup, sys_timer};
use crate::net::net::IpSettings; use crate::net::net::IpSettings;
use serde::{Deserialize, Serialize}; use serde::{Deserialize, Serialize};
@ -65,6 +66,8 @@ fn main() -> ! {
let mut state = State::default(); let mut state = State::default();
let eth_data_buffer = unsafe { addr_of_mut!(ETH_DATA_BUFFER).as_mut().unwrap()};
loop { loop {
wd.feed(); wd.feed();
@ -147,9 +150,7 @@ fn main() -> ! {
net::net::for_each(|mut socket, id| { net::net::for_each(|mut socket, id| {
if net::net::eth_is_socket_active(socket) && net::net::eth_is_socket_connected(socket) { if net::net::eth_is_socket_active(socket) && net::net::eth_is_socket_connected(socket) {
if active_report[id] { if active_report[id] {
unsafe { net::cmd_handler::send_status_report(eth_data_buffer, &mut laser, &mut thermostat, &mut socket);
net::cmd_handler::send_status_report(&mut ETH_DATA_BUFFER, &mut laser, &mut thermostat, &mut socket);
}
} }
} }
else { else {
@ -168,14 +169,12 @@ fn main() -> ! {
if eth_is_pending { if eth_is_pending {
net::net::for_each(|mut socket, id| { net::net::for_each(|mut socket, id| {
if net::net::eth_is_socket_active(socket) && net::net::eth_is_socket_connected(socket){ if net::net::eth_is_socket_active(socket) && net::net::eth_is_socket_connected(socket){
unsafe{ let bytes = net::net::eth_recv(eth_data_buffer, socket);
let bytes = net::net::eth_recv(&mut ETH_DATA_BUFFER, socket); if bytes != 0 {
if bytes != 0 { info!("Ts: {:?}", sys_timer::now());
info!("Ts: {:?}", sys_timer::now()); debug!("Number of bytes recv: {:?}", bytes);
debug!("Number of bytes recv: {:?}", bytes); // State Transition
// State Transition net::cmd_handler::execute_cmd(eth_data_buffer, bytes, &mut socket, &mut laser, &mut thermostat, &mut state, &mut device_settings, &mut active_report[id]);
net::cmd_handler::execute_cmd(&mut ETH_DATA_BUFFER, bytes, &mut socket, &mut laser, &mut thermostat, &mut state, &mut device_settings, &mut active_report[id]);
}
} }
} }
}) })
@ -225,9 +224,7 @@ fn main() -> ! {
thermostat.power_down(); thermostat.power_down();
net::net::for_each(|mut socket, _| { net::net::for_each(|mut socket, _| {
if net::net::eth_is_socket_active(socket) { if net::net::eth_is_socket_active(socket) {
unsafe { net::cmd_handler::send_response(eth_data_buffer, net::cmd_handler::ResponseEnum::HardReset, None, &mut socket);
net::cmd_handler::send_response(&mut ETH_DATA_BUFFER, net::cmd_handler::ResponseEnum::HardReset, None, &mut socket);
}
} }
}); });
} }

View File

@ -1,7 +1,7 @@
use crate::device::sys_timer::sleep; use crate::device::sys_timer::sleep;
use fugit::MegahertzU32; use fugit::MegahertzU32;
use stm32f4xx_hal::{ use stm32f4xx_hal::{
hal::{blocking::spi::Transfer, digital::v2::OutputPin}, hal::{spi::SpiBus, digital::OutputPin},
spi, spi,
}; };
@ -15,12 +15,12 @@ pub const SPI_CLOCK_MHZ: MegahertzU32 = MegahertzU32::from_raw(21);
pub const MAX_VALUE: u32 = 0x3FFFF; pub const MAX_VALUE: u32 = 0x3FFFF;
pub struct Dac<SPI: Transfer<u8>, S: OutputPin> { pub struct Dac<SPI: SpiBus<u8>, S: OutputPin> {
spi: SPI, spi: SPI,
sync: S, sync: S,
} }
impl<SPI: Transfer<u8>, S: OutputPin> Dac<SPI, S> { impl<SPI: SpiBus<u8>, S: OutputPin> Dac<SPI, S> {
pub fn new(spi: SPI, mut sync: S) -> Self { pub fn new(spi: SPI, mut sync: S) -> Self {
let _ = sync.set_low(); let _ = sync.set_low();
@ -34,7 +34,7 @@ impl<SPI: Transfer<u8>, S: OutputPin> Dac<SPI, S> {
// must be high for >= 33 ns // must be high for >= 33 ns
sleep(1); sleep(1);
let _ = self.sync.set_low(); let _ = self.sync.set_low();
self.spi.transfer(buf)?; self.spi.transfer_in_place(buf)?;
Ok(()) Ok(())
} }

View File

@ -2,12 +2,12 @@ use core::fmt;
use log::{info, warn}; use log::{info, warn};
use stm32f4xx_hal:: use stm32f4xx_hal::
{ {
spi::{Spi, TransferModeNormal}, spi::Spi,
pac::SPI3, pac::SPI3,
gpio::{PC10, PC11, PC12, PA15, Alternate, Output, PushPull}, gpio::{PA15, Output, PushPull},
hal::{ hal::{
blocking::spi::Transfer, spi::SpiBus,
digital::v2::OutputPin, digital::OutputPin,
}, },
}; };
use uom::si::{ use uom::si::{
@ -21,17 +21,17 @@ use super::{
/// AD7172-2 implementation /// AD7172-2 implementation
/// ///
/// [Manual](https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-2.pdf) /// [Manual](https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-2.pdf)
pub struct Adc<SPI: Transfer<u8>, NSS: OutputPin> { pub struct Adc<SPI: SpiBus<u8>, NSS: OutputPin> {
spi: SPI, spi: SPI,
nss: NSS, nss: NSS,
checksum_mode: ChecksumMode, checksum_mode: ChecksumMode,
} }
type AdcSpi = Spi<SPI3, (PC10<Alternate<6>>, PC11<Alternate<6>>, PC12<Alternate<6>>), TransferModeNormal>; type AdcSpi = Spi<SPI3>;
type AdcNss = PA15<Output<PushPull>>; type AdcNss = PA15<Output<PushPull>>;
pub type AdcPhy = Adc<AdcSpi, AdcNss>; pub type AdcPhy = Adc<AdcSpi, AdcNss>;
impl<SPI: Transfer<u8, Error = E>, NSS: OutputPin, E: fmt::Debug> Adc<SPI, NSS> { impl<SPI: SpiBus<u8, Error = E>, NSS: OutputPin, E: fmt::Debug> Adc<SPI, NSS> {
pub fn new(spi: SPI, mut nss: NSS) -> Result<Self, SPI::Error> { pub fn new(spi: SPI, mut nss: NSS) -> Result<Self, SPI::Error> {
let _ = nss.set_high(); let _ = nss.set_high();
let mut adc = Adc { let mut adc = Adc {
@ -272,7 +272,7 @@ impl<SPI: Transfer<u8, Error = E>, NSS: OutputPin, E: fmt::Debug> Adc<SPI, NSS>
pub fn reset(&mut self) -> Result<(), SPI::Error> { pub fn reset(&mut self) -> Result<(), SPI::Error> {
let mut buf = [0xFFu8; 8]; let mut buf = [0xFFu8; 8];
let _ = self.nss.set_low(); let _ = self.nss.set_low();
let result = self.spi.transfer(&mut buf); let result = self.spi.transfer_in_place(&mut buf);
let _ = self.nss.set_high(); let _ = self.nss.set_high();
result?; result?;
Ok(()) Ok(())
@ -282,8 +282,8 @@ impl<SPI: Transfer<u8, Error = E>, NSS: OutputPin, E: fmt::Debug> Adc<SPI, NSS>
let mut addr_buf = [addr]; let mut addr_buf = [addr];
let _ = self.nss.set_low(); let _ = self.nss.set_low();
let result = match self.spi.transfer(&mut addr_buf) { let result = match self.spi.transfer_in_place(&mut addr_buf) {
Ok(_) => self.spi.transfer(reg_data), Ok(_) => self.spi.transfer_in_place(reg_data),
Err(e) => Err(e), Err(e) => Err(e),
}; };
let result = match (result, checksum) { let result = match (result, checksum) {
@ -291,7 +291,7 @@ impl<SPI: Transfer<u8, Error = E>, NSS: OutputPin, E: fmt::Debug> Adc<SPI, NSS>
Ok(None), Ok(None),
(Ok(_), Some(checksum_out)) => { (Ok(_), Some(checksum_out)) => {
let mut checksum_buf = [checksum_out; 1]; let mut checksum_buf = [checksum_out; 1];
match self.spi.transfer(&mut checksum_buf) { match self.spi.transfer_in_place(&mut checksum_buf) {
Ok(_) => Ok(Some(checksum_buf[0])), Ok(_) => Ok(Some(checksum_buf[0])),
Err(e) => Err(e), Err(e) => Err(e),
} }

View File

@ -1,12 +1,13 @@
use crate::thermostat::ad5680; use crate::thermostat::ad5680;
use core::ptr::addr_of_mut;
use fugit::KilohertzU32; use fugit::KilohertzU32;
use stm32f4xx_hal::{ use stm32f4xx_hal::{
adc::{config::{self, AdcConfig}, Adc}, adc::{config::{self, AdcConfig}, Adc},
dma::{config::DmaConfig, PeripheralToMemory, Stream2, StreamsTuple, Transfer as DMA_Transfer}, dma::{config::DmaConfig, PeripheralToMemory, Stream2, StreamsTuple, Transfer as DMA_Transfer},
gpio::{gpioa::*, gpiob::*, gpioc::*, Alternate, Analog, Output, PushPull}, gpio::{gpioa::*, gpiob::*, gpioc::*, Analog, Output, PushPull},
hal::{self, blocking::spi::Transfer, digital::v2::OutputPin}, hal::{self, spi::SpiBus, digital::OutputPin},
pac::{ADC1, ADC2, DMA2, SPI1, TIM4, Peripherals, NVIC}, pac::{ADC1, ADC2, DMA2, SPI1, TIM4, Peripherals, NVIC},
spi::{NoMiso, Spi, TransferModeNormal}, spi::Spi,
timer::pwm::PwmChannel, timer::pwm::PwmChannel,
interrupt interrupt
}; };
@ -20,7 +21,7 @@ use uom::si::{
pub const PWM_FREQ_KHZ: KilohertzU32 = KilohertzU32::from_raw(20); pub const PWM_FREQ_KHZ: KilohertzU32 = KilohertzU32::from_raw(20);
pub trait ChannelPins { pub trait ChannelPins {
type DacSpi: Transfer<u8>; type DacSpi: SpiBus<u8>;
type DacSync: OutputPin; type DacSync: OutputPin;
type ShdnPin: OutputPin; type ShdnPin: OutputPin;
type VRefPin; type VRefPin;
@ -71,7 +72,7 @@ pub struct MAX1968PinSet<C: ChannelPins> {
pub max_i_neg: C::MAXINegPin, pub max_i_neg: C::MAXINegPin,
} }
type DacSpi = Spi<SPI1, (PB3<Alternate<5>>, NoMiso, PB5<Alternate<5>>), TransferModeNormal>; type DacSpi = Spi<SPI1>;
type DacSync = PB4<Output<PushPull>>; type DacSync = PB4<Output<PushPull>>;
static mut DMA_TRANSFER_COMPLETE: bool = true; static mut DMA_TRANSFER_COMPLETE: bool = true;
@ -157,7 +158,7 @@ impl MAX1968 {
let dma = StreamsTuple::new(dma2); let dma = StreamsTuple::new(dma2);
let dma_adc : DMA_Transfer<Stream2<DMA2>, 1, Adc<ADC2>, PeripheralToMemory, &'static mut [u16; 16]>; let dma_adc : DMA_Transfer<Stream2<DMA2>, 1, Adc<ADC2>, PeripheralToMemory, &'static mut [u16; 16]>;
unsafe { unsafe {
dma_adc = DMA_Transfer::init_peripheral_to_memory(dma.2, pins_adc2, &mut ADC2_FIRST_BUFFER, None, dma_config); dma_adc = DMA_Transfer::init_peripheral_to_memory(dma.2, pins_adc2, addr_of_mut!(ADC2_FIRST_BUFFER).as_mut().unwrap(), None, dma_config);
NVIC::unmask(interrupt::DMA2_STREAM2); NVIC::unmask(interrupt::DMA2_STREAM2);
} }
@ -185,7 +186,7 @@ impl MAX1968 {
let buffer: &[u16; 16]; let buffer: &[u16; 16];
unsafe { unsafe {
(buffer, _) = self.dma_adc (buffer, _) = self.dma_adc
.next_transfer(&mut ADC2_LOCAL_BUFFER) .next_transfer(addr_of_mut!(ADC2_LOCAL_BUFFER).as_mut().unwrap())
.unwrap(); .unwrap();
} }
@ -284,21 +285,34 @@ impl MAX1968 {
} }
pub fn set_pwm(&mut self, pwm_pin: PwmPinsEnum, duty: f64, max_duty: f64) -> f64 { pub fn set_pwm(&mut self, pwm_pin: PwmPinsEnum, duty: f64, max_duty: f64) -> f64 {
fn set<P: hal::PwmPin<Duty = u16>>(pin: &mut P, duty: f64) -> f64 { fn duty_cycle_value(duty_cycle: f64, duty_cycle_limit: f64, max_value: u16) -> u16 {
let max = pin.get_max_duty(); ((duty_cycle.min(duty_cycle_limit) * (max_value as f64)) as u16).min(max_value)
let value = ((duty * (max as f64)) as u16).min(max);
pin.set_duty(value);
pin.enable();
value as f64 / (max as f64)
} }
let duty = duty.min(max_duty); let value: u16;
let max_value: u16;
match pwm_pin { match pwm_pin {
PwmPinsEnum::MaxV => set(&mut self.phy.max_v, duty), PwmPinsEnum::MaxV => {
PwmPinsEnum::MaxPosI => set(&mut self.phy.max_i_pos, duty), self.phy.max_v.enable();
PwmPinsEnum::MaxNegI => set(&mut self.phy.max_i_neg, duty), max_value = self.phy.max_v.get_max_duty();
value = duty_cycle_value(duty, max_duty, max_value);
self.phy.max_v.set_duty(value);
}
PwmPinsEnum::MaxPosI => {
self.phy.max_i_pos.enable();
max_value = self.phy.max_i_pos.get_max_duty();
value = duty_cycle_value(duty, max_duty, max_value);
self.phy.max_i_pos.set_duty(value);
}
PwmPinsEnum::MaxNegI => {
self.phy.max_i_neg.enable();
max_value = self.phy.max_i_neg.get_max_duty();
value = duty_cycle_value(duty, max_duty, max_value);
self.phy.max_i_neg.set_duty(value);
}
} }
return (value as f64) / (max_value as f64);
} }
} }