From 86a9fb039e14be322dbf3b3194c53bddf566cf51 Mon Sep 17 00:00:00 2001 From: linuswck Date: Mon, 26 Feb 2024 16:40:10 +0800 Subject: [PATCH] boot: Correct PCLK1, PCLK2 freq value - PCLK is divided from HCLK in power of two - abs max pclk1 = 42MHz - abs max pclk2 = 84MHz --- src/device/boot.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/device/boot.rs b/src/device/boot.rs index f6f5e90..79c1af1 100644 --- a/src/device/boot.rs +++ b/src/device/boot.rs @@ -38,8 +38,8 @@ pub fn bootup( .use_hse(MegaHertz::from_raw(8).convert()) .sysclk(MegaHertz::from_raw(168).convert()) .hclk(MegaHertz::from_raw(168).convert()) - .pclk1(MegaHertz::from_raw(32).convert()) - .pclk2(MegaHertz::from_raw(64).convert()) + .pclk1(MegaHertz::from_raw(42).convert()) + .pclk2(MegaHertz::from_raw(84).convert()) .freeze(); sys_timer::setup(core_perif.SYST, clocks);