forked from M-Labs/kirdy
Analog_Wdg: Finish Power Excursion Protection fns
- Verified to be working
This commit is contained in:
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07ea733b34
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@ -13,6 +13,7 @@ use stm32f4xx_hal::{
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watchdog::IndependentWatchdog,
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};
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use uom::si::electric_current::milliampere;
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use uom::si::{electric_current::ampere, f64::ElectricCurrent};
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#[cfg(not(feature = "semihosting"))]
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@ -65,6 +66,7 @@ pub fn bootup(
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laser.ld_open();
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laser.set_ld_drive_current_limit(ElectricCurrent::new::<ampere>(0.2));
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laser.ld_set_i(ElectricCurrent::new::<ampere>(0.15));
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laser.set_pd_i_limit(ElectricCurrent::new::<milliampere>(2.5));
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laser.power_up();
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let tec_driver = MAX1968::new(max1968_phy, perif.ADC1);
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@ -76,6 +78,8 @@ pub fn bootup(
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thermostat.calibrate_dac_value();
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thermostat.set_i(ElectricCurrent::new::<ampere>(1.0));
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laser.set_pd_mon_calibrated_vdda(thermostat.get_calibrated_vdda());
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let flash_store = flash_store::store(perif.FLASH);
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let mut wd = IndependentWatchdog::new(perif.IWDG);
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@ -1,90 +1,133 @@
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// stm32f4xx_hal does not provide config and driver for analog watchdog yet
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use stm32f4xx_hal::pac;
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use stm32f4xx_hal::rcc::Enable;
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use stm32f4xx_hal::{
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pac::{ADC2, NVIC},
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gpio::{Analog, Output, PushPull, gpioa::PA3, gpiod::PD9},
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interrupt,
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};
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use uom::si::electric_potential::millivolt;
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use uom::si::f64::ElectricPotential;
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use uom::si::{
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electric_potential::millivolt,
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f64::ElectricPotential,
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ratio::ratio
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};
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use crate::info;
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// 12 bit Resolution
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const MAX_SAMPLE: u16 = 4095;
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pub type LdPwrEnPinType = PD9<Output<PushPull>>;
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pub type PdMonAdcPinType = PA3<Analog>;
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const PD_MON_ADC_CH_ID: u8 = 0x03;
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static mut ANALOG_WDG: Option<LdAnalogWdg> = None;
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pub struct LdAnalogWdgPhy {
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// To make sure PA3 is configured to Analog mode
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// To make sure Pd Mon Pin is configured to Analog mode
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pub _pd_mon_ch0: PdMonAdcPinType,
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pub pwr_en_ch0: LdPwrEnPinType,
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}
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#[derive(Clone)]
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pub struct AlarmStatus {
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alarm: bool,
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val: u16,
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pub struct Status {
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pub pwr_excursion: bool,
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pub v_tripped: ElectricPotential,
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pub pwr_engaged: bool,
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pub v: ElectricPotential,
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}
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impl Default for Status {
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fn default() -> Self {
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Status {
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pwr_excursion: false,
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v_tripped: ElectricPotential::new::<millivolt>(0.0),
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pwr_engaged: false,
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v: ElectricPotential::new::<millivolt>(0.0),
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}
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}
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}
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pub struct LdAnalogWdg {
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pac: ADC2,
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phy: LdAnalogWdgPhy,
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alarm_status: AlarmStatus,
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alarm_status: Status,
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//Calibrated VDDA in millivolt from Adc<ADC1>.calibrate()
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calibrated_vdda: u32,
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}
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impl LdAnalogWdg {
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/// ADC interrupt is disabled and continuous conversion is started by default
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pub fn setup(pac: ADC2, phy: LdAnalogWdgPhy){
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unsafe { ANALOG_WDG = Some(LdAnalogWdg{
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pac: pac,
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phy: phy,
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alarm_status: AlarmStatus {
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alarm: false,
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val: 0x0000,
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},
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calibrated_vdda: 3300,
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});
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/// ADC Analog Watchdog is configured to guard a single regular Adc channel on Pd Mon Pin.
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/// ADC is configured to start continuous conversion without using DMA immediately.
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/// Interrupt is disabled by default.
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pub fn setup(pac_adc: ADC2, mut phy: LdAnalogWdgPhy){
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unsafe {
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// All ADCs share the same reset interface.
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// NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
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let rcc = &(*pac::RCC::ptr());
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// Enable the ADC2 Clock
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pac::ADC2::enable(rcc);
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// Enable ADC Interrupt
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NVIC::unmask(interrupt::ADC);
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}
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pac_adc.cr1.reset();
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pac_adc.cr2.reset();
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pac_adc.sqr1.reset();
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pac_adc.sqr2.reset();
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pac_adc.sqr3.reset();
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pac_adc.cr1.write(|w| w
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// 12 Bit Resolution
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.res().twelve_bit()
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// Set Analog Watchdog to guard Single Regular Channel
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.awden().enabled()
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.awdsgl().single_channel()
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.jawden().disabled()
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// Disable Analog Watchdog Interrupt
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.awdie().disabled()
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// Set Analog Watchdog to monitor Pd Mon Pin
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.awdch().variant(PD_MON_ADC_CH_ID)
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);
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pac_adc.cr2.write(|w| w
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// Continous Conversion Mode
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.cont().set_bit()
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// Power up ADC
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.adon().set_bit()
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// Set data alignment to the right
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.align().right()
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// End of conversion selection: Each Sequence
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.eocs().each_sequence()
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.exten().disabled()
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.extsel().tim1cc1()
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);
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// Set the Conversion Sequence to include Pd Mon Pin
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pac_adc.sqr3.write(|w| w
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.sq1().variant(PD_MON_ADC_CH_ID)
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);
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// Set all sampling channel to have fastest sampling interval
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pac_adc.smpr1.reset();
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pac_adc.smpr2.reset();
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// Set the high threshold to be max value initially
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pac_adc.htr.write(|w| w.ht().variant(MAX_SAMPLE));
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// Set the low threshold to be min value initially
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pac_adc.ltr.write(|w| w.lt().variant(0));
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// SWStart should only be set when ADON = 1. Otherwise no conversion is launched.
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pac_adc.cr2.modify(|_, w| w
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.swstart().set_bit()
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);
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// Turn LD Power Off by default
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phy.pwr_en_ch0.set_low();
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unsafe {
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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wdg.pac.cr1.write(|w| w
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// 12 Bit Resolution
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.res().twelve_bit()
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// Enable Analog Watchdog on Single Regular Channel
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.awden().enabled()
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.awdsgl().single_channel()
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.jawden().disabled()
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// Disable Analog Watchdog Interrupt
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.awdie().disabled()
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// Select Analog Watchdog Channel 3 (PA3) on ADC2
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.awdch().bits(0x03)
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);
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wdg.pac.cr2.write(|w| w
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// Continous Conversion mode
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.cont().set_bit()
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// Enable ADC
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.adon().set_bit()
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// Start ADC Conversion
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.swstart().set_bit()
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);
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// Set Sampling Time for Channel 3 to 480 Cycle
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wdg.pac.smpr2.write(|w| w
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.smp3().cycles480()
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);
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// Set the high threshold to be max value initially
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wdg.pac.htr.write(|w| w.bits(0xFFFF_FFFF));
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// Set the high threshold to be min value initially
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wdg.pac.ltr.write(|w| w.bits(0x0000_0000));
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// Set the Conversion Sequence to only have Channel 3 (PA3)
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wdg.pac.sqr3.write(|w| w
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.sq1().bits(0x03)
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);
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}
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ANALOG_WDG = Some(
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LdAnalogWdg {
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pac: pac_adc,
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phy: phy,
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alarm_status: Status::default(),
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calibrated_vdda: 3300,
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}
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);
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}
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}
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@ -92,68 +135,53 @@ impl LdAnalogWdg {
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unsafe { ANALOG_WDG.as_mut() }
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}
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/// This fn accepts the calibrated vdda value from Adc<ADC1>.calibrate()
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fn convert_sample_to_volt(sample :u16) -> ElectricPotential {
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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return ElectricPotential::new::<millivolt>(((u32::from(sample) * wdg.calibrated_vdda) / u32::from(MAX_SAMPLE)) as f64)
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}
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ElectricPotential::new::<millivolt>(0.0)
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}
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pub fn set_trigger_threshold_v(htr: ElectricPotential){
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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let code: u32 = ((htr / (ElectricPotential::new::<millivolt>(wdg.calibrated_vdda as f64))).get::<ratio>() * (MAX_SAMPLE as f64)) as u32;
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wdg.pac.htr.write(|w| unsafe {w.bits(code)});
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info!("trigger_threshold_v: {:?}", code);
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}
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}
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pub fn set_calibrated_vdda(val: u32) {
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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wdg.calibrated_vdda = val;
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}
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}
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pub fn get_pd_v() -> ElectricPotential {
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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let sample = wdg.pac.dr.read().data().bits();
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return ElectricPotential::new::<millivolt>(((u32::from(sample) * wdg.calibrated_vdda) / u32::from(MAX_SAMPLE)) as f64)
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}
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ElectricPotential::new::<millivolt>(0.0)
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}
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fn set_alarm(){
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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wdg.alarm_status = AlarmStatus {
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alarm: true,
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val: wdg.pac.dr.read().data().bits(),
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};
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}
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}
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pub fn get_alarm_status() -> AlarmStatus {
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pub fn get_status() -> Status {
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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wdg.alarm_status.v = LdAnalogWdg::convert_sample_to_volt(wdg.pac.dr.read().data().bits());
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return wdg.alarm_status.clone()
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}
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AlarmStatus {
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alarm: false,
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val: 0x0000,
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Status::default()
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}
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pub fn pwr_on_and_arm_protection(){
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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wdg.alarm_status = Status::default();
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LdAnalogWdg::pwr_on();
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// Interrupt should be enabled after power on to tackle the following edge case:
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// Pd_Mon pin voltage has already exceed threshold before LD Power is on.
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LdAnalogWdg::enable_watchdog_interrupt();
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}
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}
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pub fn clear_alarm_status(){
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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wdg.alarm_status = AlarmStatus {
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alarm: false,
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val: 0x0000,
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};
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wdg.alarm_status.pwr_excursion = false;
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wdg.alarm_status.v_tripped = ElectricPotential::new::<millivolt>(0.0);
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}
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}
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/// Set ADC Watchdog Higher threshold register
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/// Interrupt is triggered when ADC value is ABOVE the value set
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pub fn set_htr(htr: u32){
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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wdg.pac.htr.write(|w| unsafe {w.bits(htr)});
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}
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}
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/// Set ADC Watchdog Lower threshold register
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/// Interrupt is triggered when ADC value is BELOW the value set
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#[allow(unused)]
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pub fn set_ltr(ltr:u32){
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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wdg.pac.ltr.write(|w| unsafe {w.bits(ltr)});
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}
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}
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pub fn enable_watchdog_interrupt(){
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fn enable_watchdog_interrupt(){
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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wdg.pac.cr1.modify(|_, w| w
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.awdie().set_bit()
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@ -161,7 +189,7 @@ impl LdAnalogWdg {
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}
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}
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pub fn disable_watchdog_interrupt(){
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fn disable_watchdog_interrupt(){
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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wdg.pac.cr1.modify(|_, w| w
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.awdie().clear_bit()
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@ -170,36 +198,41 @@ impl LdAnalogWdg {
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}
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fn clear_interrupt_bit(){
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unsafe{
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NVIC::unmask(interrupt::ADC);
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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wdg.pac.sr.modify(|_, w| w
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.awd().clear_bit()
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);
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}
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}
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pub fn is_pwr_engaged() -> bool{
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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return wdg.phy.pwr_en_ch0.is_set_high()
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}
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false
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}
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pub fn pwr_engage(){
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fn pwr_on(){
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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wdg.alarm_status.pwr_engaged = true;
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wdg.phy.pwr_en_ch0.set_high()
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}
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}
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pub fn pwr_disengage(){
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pub fn pwr_off(){
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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wdg.alarm_status.pwr_engaged = false;
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wdg.phy.pwr_en_ch0.set_low()
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}
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}
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fn power_excursion_handler(){
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if let Some(ref mut wdg ) = LdAnalogWdg::get() {
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let sample = wdg.pac.dr.read().data().bits();
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LdAnalogWdg::pwr_off();
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wdg.alarm_status.pwr_excursion = true;
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wdg.alarm_status.v_tripped = LdAnalogWdg::convert_sample_to_volt(sample);
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}
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}
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}
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#[interrupt]
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fn ADC(){
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cortex_m::interrupt::free(|_| {
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LdAnalogWdg::set_alarm();
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LdAnalogWdg::pwr_disengage();
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LdAnalogWdg::power_excursion_handler();
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// Disable interrupt to avoid getting stuck in infinite interrupt loop
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LdAnalogWdg::disable_watchdog_interrupt();
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LdAnalogWdg::clear_interrupt_bit();
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@ -72,7 +72,7 @@ impl LdDrive{
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}
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pub fn setup(&mut self) {
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LdAnalogWdg::pwr_disengage();
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LdAnalogWdg::pwr_off();
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self.ld_set_i(ElectricCurrent::new::<milliampere>(0.0));
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self.ld_short();
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}
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@ -94,15 +94,15 @@ impl LdDrive{
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}
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pub fn power_up(&mut self){
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LdAnalogWdg::pwr_engage();
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LdAnalogWdg::pwr_on_and_arm_protection();
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}
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pub fn power_down(&mut self){
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LdAnalogWdg::pwr_disengage();
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LdAnalogWdg::pwr_off();
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}
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pub fn get_pd_i(&mut self) -> ElectricCurrent {
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LdAnalogWdg::get_pd_v() * Settings::PD_MON_TRANSCONDUCTANCE
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LdAnalogWdg::get_status().v * Settings::PD_MON_TRANSCONDUCTANCE
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}
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pub fn ld_set_i(&mut self, i: ElectricCurrent) -> ElectricCurrent {
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@ -113,28 +113,28 @@ impl LdDrive{
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}
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// Set the calibrated VDDA value obtained from ADC1 calibration
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pub fn set_pd_mon_calibrated_vdda(val_cal: u32) {
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pub fn set_pd_mon_calibrated_vdda(&mut self, val_cal: u32) {
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LdAnalogWdg::set_calibrated_vdda(val_cal)
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}
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pub fn pd_mon_status() -> analog_wdg::AlarmStatus {
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LdAnalogWdg::get_alarm_status()
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pub fn pd_mon_status(&mut self) -> analog_wdg::Status {
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LdAnalogWdg::get_status()
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}
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pub fn pd_mon_clear_alarm(&mut self) {
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LdAnalogWdg::clear_alarm_status();
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}
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pub fn pd_mon_engage(){
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LdAnalogWdg::enable_watchdog_interrupt()
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}
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pub fn pd_mon_disengage(){
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LdAnalogWdg::disable_watchdog_interrupt()
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}
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pub fn set_ld_power_limit(pwr_limit: Power){
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// LdAnalogWdg::set_htr(convert pwr_limit to raw adc code)
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pub fn set_ld_power_limit(&mut self, pwr_limit: Power){
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// LdAnalogWdg::set_trigger_threshold_v(convert pwr_limit to raw adc code)
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unimplemented!()
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}
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}
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pub fn set_pd_i_limit(&mut self, i: ElectricCurrent){
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LdAnalogWdg::set_trigger_threshold_v(i / Settings::PD_MON_TRANSCONDUCTANCE);
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}
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pub fn set_pd_v_limit(&mut self, v: ElectricPotential){
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LdAnalogWdg::set_trigger_threshold_v(v);
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}
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}
|
||||
|
|
|
@ -80,7 +80,10 @@ fn main() -> ! {
|
|||
info!("curr_vref: {:?}", volt_fmt.with(thermostat.get_vref()));
|
||||
info!("curr_tec_i: {:?}", amp_fmt.with(thermostat.get_tec_i()));
|
||||
info!("curr_tec_v: {:?}", volt_fmt.with(thermostat.get_tec_v()));
|
||||
|
||||
info!("pd_mon_v: {:?}", volt_fmt.with(laser.pd_mon_status().v));
|
||||
info!("power_excursion: {:?}", laser.pd_mon_status().pwr_excursion);
|
||||
|
||||
sys_timer::sleep(10);
|
||||
sys_timer::sleep(500);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -117,7 +117,8 @@ impl MAX1968 {
|
|||
let config = AdcConfig::default()
|
||||
.clock(config::Clock::Pclk2_div_8)
|
||||
.default_sample_time(config::SampleTime::Cycles_480);
|
||||
let mut pins_adc = Adc::adc1(adc1, true, config);
|
||||
// Do not set reset RCCs as it causes other ADCs' clock to be disabled
|
||||
let mut pins_adc = Adc::adc1(adc1, false, config);
|
||||
pins_adc.calibrate();
|
||||
|
||||
let config = AdcConfig::default()
|
||||
|
|
Loading…
Reference in New Issue