forked from M-Labs/artiq-zynq
restart and communicate with core1 in handle_connection
This commit is contained in:
parent
1c67ff50e3
commit
abe0a549b5
10
Cargo.lock
generated
10
Cargo.lock
generated
@ -43,7 +43,7 @@ version = "0.1.0"
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[[package]]
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[[package]]
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name = "libasync"
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name = "libasync"
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version = "0.0.0"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#bcedd02ad95f6afd241e0759f5c3a33a1b26d32d"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#50667f0a13839bee519bd5e55dbad60a91b38a67"
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dependencies = [
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dependencies = [
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"libcortex_a9",
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"libcortex_a9",
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"pin-utils",
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"pin-utils",
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@ -53,7 +53,7 @@ dependencies = [
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[[package]]
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[[package]]
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name = "libboard_zynq"
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name = "libboard_zynq"
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version = "0.0.0"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#bcedd02ad95f6afd241e0759f5c3a33a1b26d32d"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#50667f0a13839bee519bd5e55dbad60a91b38a67"
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dependencies = [
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dependencies = [
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"bit_field",
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"bit_field",
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"libcortex_a9",
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"libcortex_a9",
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@ -65,7 +65,7 @@ dependencies = [
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[[package]]
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[[package]]
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name = "libcortex_a9"
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name = "libcortex_a9"
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version = "0.0.0"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#bcedd02ad95f6afd241e0759f5c3a33a1b26d32d"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#50667f0a13839bee519bd5e55dbad60a91b38a67"
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dependencies = [
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dependencies = [
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"bit_field",
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"bit_field",
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"libregister",
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"libregister",
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@ -74,7 +74,7 @@ dependencies = [
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[[package]]
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[[package]]
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name = "libregister"
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name = "libregister"
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version = "0.0.0"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#bcedd02ad95f6afd241e0759f5c3a33a1b26d32d"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#50667f0a13839bee519bd5e55dbad60a91b38a67"
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dependencies = [
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dependencies = [
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"bit_field",
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"bit_field",
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"vcell",
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"vcell",
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@ -84,7 +84,7 @@ dependencies = [
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[[package]]
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[[package]]
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name = "libsupport_zynq"
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name = "libsupport_zynq"
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version = "0.0.0"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#bcedd02ad95f6afd241e0759f5c3a33a1b26d32d"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#50667f0a13839bee519bd5e55dbad60a91b38a67"
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dependencies = [
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dependencies = [
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"compiler_builtins",
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"compiler_builtins",
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"libboard_zynq",
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"libboard_zynq",
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@ -154,7 +154,7 @@ async fn handle_connection(stream: &TcpStream, control: Rc<RefCell<kernel::Contr
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},
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},
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Request::LoadKernel => {
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Request::LoadKernel => {
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let length = read_i32(&stream).await? as usize;
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let length = read_i32(&stream).await? as usize;
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let mut kernel_buffer = unsafe { &mut kernel::KERNEL_BUFFER };
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let kernel_buffer = unsafe { &mut kernel::KERNEL_BUFFER };
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if kernel_buffer.len() < length {
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if kernel_buffer.len() < length {
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read_drain(&stream, length).await?;
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read_drain(&stream, length).await?;
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send_header(&stream, Reply::LoadFailed).await?;
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send_header(&stream, Reply::LoadFailed).await?;
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@ -164,13 +164,16 @@ async fn handle_connection(stream: &TcpStream, control: Rc<RefCell<kernel::Contr
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}
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}
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println!("length={}, {:?}", length, &kernel_buffer[..256]);
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println!("length={}, {:?}", length, &kernel_buffer[..256]);
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let mut control = control.borrow_mut();
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control.restart();
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for i in 0..10 {
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control.tx.async_send(i).await;
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let j = control.rx.async_recv().await;
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println!("{} -> {}", i, j);
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}
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// TODO: dyld
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// TODO: dyld
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control.borrow_mut()
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.take()
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.map(|control| control.reset());
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*control.borrow_mut() = Some(kernel::Control::start(8192));
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}
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}
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_ => return Err(Error::UnrecognizedPacket)
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_ => return Err(Error::UnrecognizedPacket)
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}
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}
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@ -217,7 +220,7 @@ pub fn main() {
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Sockets::init(32);
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Sockets::init(32);
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let control: Rc<RefCell<Option<kernel::Control>>> = Rc::new(RefCell::new(None));
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let control: Rc<RefCell<kernel::Control>> = Rc::new(RefCell::new(kernel::Control::start(8192)));
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task::spawn(async move {
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task::spawn(async move {
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loop {
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loop {
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@ -29,11 +29,18 @@ impl Control {
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}
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}
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}
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}
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pub fn reset(self) {
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pub fn restart(&mut self) {
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*CHANNEL_0TO1.lock() = None;
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*CHANNEL_0TO1.lock() = None;
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*CHANNEL_1TO0.lock() = None;
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*CHANNEL_1TO0.lock() = None;
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self.core1.reset();
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self.core1.restart();
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let (core0_tx, core1_rx) = sync_channel(4);
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let (core1_tx, core0_rx) = sync_channel(4);
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*CHANNEL_0TO1.lock() = Some(core1_rx);
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*CHANNEL_1TO0.lock() = Some(core1_tx);
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self.tx = core0_tx;
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self.rx = core0_rx;
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}
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}
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}
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}
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