forked from M-Labs/artiq-zynq
satellite: support optional args
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29cc0a6e28
commit
7263862fd8
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@ -107,6 +107,7 @@ pub enum Message {
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#[cfg(has_drtio)]
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SubkernelMsgRecvReply {
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status: SubkernelStatus,
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count: u8,
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},
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}
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@ -65,6 +65,7 @@ pub struct Sliceable {
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/* represents interkernel messages */
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struct Message {
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count: u8,
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tag: u8,
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data: Vec<u8>,
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}
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@ -181,8 +182,9 @@ impl MessageManager {
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Some(message) => message.data.extend(&data[..length]),
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None => {
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self.in_buffer = Some(Message {
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tag: data[0],
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data: data[1..length].to_vec(),
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count: data[0],
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tag: data[1],
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data: data[2..length].to_vec(),
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});
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}
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};
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@ -529,6 +531,7 @@ impl<'a> Manager<'_> {
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if timer.get_time() > timeout {
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self.control.tx.send(kernel::Message::SubkernelMsgRecvReply {
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status: kernel::SubkernelStatus::Timeout,
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count: 0,
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});
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self.session.kernel_state = KernelState::Running;
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return Ok(());
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@ -536,6 +539,7 @@ impl<'a> Manager<'_> {
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if let Some(message) = self.session.messages.get_incoming() {
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self.control.tx.send(kernel::Message::SubkernelMsgRecvReply {
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status: kernel::SubkernelStatus::NoError,
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count: message.count,
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});
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self.session.kernel_state = KernelState::Running;
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self.pass_message_to_kernel(&message, timer)
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@ -559,6 +563,7 @@ impl<'a> Manager<'_> {
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fn pass_message_to_kernel(&mut self, message: &Message, timer: GlobalTimer) -> Result<(), Error> {
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let mut reader = Cursor::new(&message.data);
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let mut tag: [u8; 1] = [message.tag];
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let mut i = message.count;
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loop {
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let slot = match recv_w_timeout(&mut self.control.rx, timer, 100)? {
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kernel::Message::RpcRecvRequest(slot) => slot,
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@ -601,11 +606,12 @@ impl<'a> Manager<'_> {
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unexpected!("{}", unexpected);
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}
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self.control.tx.send(kernel::Message::RpcRecvReply(Ok(0)));
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match reader.read_u8() {
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Ok(0) | Err(_) => break, // reached the end of data, we're done
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Ok(t) => {
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tag[0] = t;
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} // update the tag for next read
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i -= 1;
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if i == 0 {
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break;
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} else {
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// update the tag for next read
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tag[0] = reader.read_u8()?;
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}
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}
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Ok(())
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