forked from M-Labs/artiq-zynq
szl: enabled FPU
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214337387f
commit
57da6f05fd
@ -31,7 +31,7 @@ pub fn compile_unlzma() {
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cfg.flag("-ffreestanding");
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cfg.flag("-fPIC");
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cfg.flag("-fno-stack-protector");
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cfg.flag("--target=armv7-unknown-linux");
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cfg.flag("--target=armv7-none-eabihf");
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cfg.flag("-O2");
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let sources = vec![
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@ -1,5 +1,6 @@
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#![no_std]
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#![no_main]
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#![feature(llvm_asm)]
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extern crate log;
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@ -36,6 +37,18 @@ pub fn main_core0() {
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log::set_max_level(log::LevelFilter::Debug);
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info!("Simple Zynq Loader starting...");
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unsafe {
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llvm_asm!("
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mrc p15, 0, r1, c1, c0, 2
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orr r1, r1, (0b1111<<20)
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mcr p15, 0, r1, c1, c0, 2
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vmrs r1, fpexc
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orr r1, r1, (1<<30)
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vmsr fpexc, r1
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":::"r1");
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}
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info!("FPU enabled on Core0");
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const CPU_FREQ: u32 = 800_000_000;
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ArmPll::setup(2 * CPU_FREQ);
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