forked from M-Labs/artiq-zynq
acpki: add legacy i_status/o_status registers
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@ -166,6 +166,8 @@ class KernelInitiator(Module, AutoCSR):
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self.counter = CSRStatus(64)
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self.counter_update = CSR()
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self.o_status = CSRStatus(3)
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self.i_status = CSRStatus(4)
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self.submodules.engine = Engine(bus, user)
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self.cri = rtio.cri.Interface()
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@ -250,5 +252,9 @@ class KernelInitiator(Module, AutoCSR):
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If(cmd_write, Case(self.engine.din_index, din_cases_cmdwrite)),
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]
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# RTIO counter access
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# CRI CSRs
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self.sync += If(self.counter_update.re, self.counter.status.eq(tsc.full_ts_cri))
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self.comb += [
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self.o_status.status.eq(self.cri.o_status),
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self.i_status.status.eq(self.cri.i_status),
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]
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