Commit Graph

34 Commits

Author SHA1 Message Date
208ba8379a dsp, lockin: use cascaded 1st order lowpasses 2021-02-09 20:37:46 +01:00
2a84e3f299 dsp: remove unused code, let the compiler decide about inlining 2021-02-01 18:37:05 +01:00
2c60103696 dsp: accu: add, iir: rename IIRState to Vec5 2021-02-01 12:23:47 +01:00
df337f85b8 reciprocal_pll -> rpll 2021-01-25 09:54:56 +01:00
0cd2140668 rafactor complex, cossin, atan2 2021-01-21 16:12:59 +01:00
948e58c910 lockin: refactor Lockin 2021-01-21 14:57:44 +01:00
20488ea3bc lockin: refine 2021-01-19 11:01:21 +01:00
Matt Huszagh
9f0b3eb77e fix shift_round overflow error 2021-01-14 14:51:07 -08:00
Matt Huszagh
76088efda5 dsp: add reciprocal_pll 2021-01-13 08:37:33 -08:00
Matt Huszagh
80ed715f5a shift sin/cos before demodulation product to avoid i64 2021-01-12 16:07:04 -08:00
Matt Huszagh
41ea2ebed4 use round up half integer rounding 2021-01-12 15:59:03 -08:00
Matt Huszagh
e14aa8b613 move lock-in code to main.rs 2021-01-12 10:45:34 -08:00
Matt Huszagh
891aad3f17 remove debug_assert in divide_round 2021-01-12 07:43:28 -08:00
Matt Huszagh
bae295140d update lock-in for integer math and PLL 2021-01-12 07:36:56 -08:00
cc42c0c477 iir_int: add optimized integer iir implementation 2020-12-22 16:49:12 +01:00
Matt Huszagh
09a744f59c dsp: move iir generic math functions to top-level module scope 2020-12-17 10:04:48 -08:00
Matt Huszagh
7c4f608206 move cossin and atan2 into the same trig file 2020-12-16 16:26:44 -08:00
Matt Huszagh
17f9f0750e dsp: move abs to lib.rs 2020-12-16 16:01:50 -08:00
Matt Huszagh
e89db65722 rename trig.rs -> cossin.rs 2020-12-16 15:57:47 -08:00
7fa4b76e4d cossin_table: fix build script usage 2020-12-10 17:17:09 +01:00
77cb0bbad0 cossin: refactor and tweak
* shrink the LUT by another bit
* correctly use the octant bit to offset the dphi to LUT entry midpoint
* add more diagnistics to the unittest and rewrite it in relative units
* MSB-align phase and output to match the PLL data, dynamic range and
  remove the need for roudning bias.
* clean up the build.rs table generator a bit
2020-12-10 16:56:13 +01:00
Matt Huszagh
a82b0f3e90 trig: fix formatting 2020-12-09 15:53:56 -08:00
Matt Huszagh
4add34cf9a add cossin LUT 2020-12-09 15:40:18 -08:00
941a94bbf6 dsp/pll: style 2020-12-05 11:44:09 +01:00
47806a155d
Merge branch 'master' into feature/unwrap 2020-12-05 09:58:15 +01:00
2179560a3c unwrap: add phase unwrapping tools 2020-12-05 09:56:41 +01:00
Matt Huszagh
277a5d2d81 dsp: move common test code to testing.rs file 2020-12-04 09:16:09 -08:00
Matt Huszagh
260206e4f0 dsp: implement Complex as type alias for tuple 2020-12-04 09:15:33 -08:00
Matt Huszagh
d1b7efad48 dsp: replace in_phase and quadrature with Complex 2020-12-04 09:15:13 -08:00
Matt Huszagh
85adc8b1e1 add lockin module 2020-12-04 09:14:37 -08:00
644d85c115 pll: init 2020-12-04 10:53:36 +01:00
74349e5d68 iir: more generic math helpers, use core::intrinsics 2020-11-27 10:36:30 +01:00
468929690d iir: vminnm/vmaxnm 2020-11-26 14:26:44 +01:00
Matt Huszagh
3eb43c6b99 move iir to new dsp crate 2020-11-22 07:59:12 -08:00