* shrink the LUT by another bit
* correctly use the octant bit to offset the dphi to LUT entry midpoint
* add more diagnistics to the unittest and rewrite it in relative units
* MSB-align phase and output to match the PLL data, dynamic range and
remove the need for roudning bias.
* clean up the build.rs table generator a bit
187: Added cascaded IIR with server commands for up to 2 cascaded IIRs per… r=jordens a=nkuh
… channel.
Note: If the number of cascaded IIRs is set to 1 the still existent server commands for the unused 2nd cascade level will be aliases for the 1st level.
Co-authored-by: Niklas Kuhrmeyer <niklas.kuhrmeyer@ptb.de>
Co-authored-by: Robert Jördens <rj@quartiq.de>
180: Feature/adc dac io macros r=jordens a=jordens
I wanted to try macros.
This moves the ADC and DAC DMA setup into macros reducing code footprint. Hopefully no functional changes there.
I didn't test this on hardware and I may have missed differences between `Adc0`/`Adc1` and `Dac0`/`Dac1`.
It removes the `AdcInputs` and `DacOutputs` structs and replaces them with tuples as they were just fan-outs/fan-ins.
It also does some minor tweaks in the `process()` ISR towards higher flexibility enforces some data patterns to help the compiler.
Differences missing:
* [x] `.transfer_complete_interrupt(true)` for `Adc1` only: needed
* [x] `.circular_buffer(true);` for `Dac1` only: close#183
Co-authored-by: Robert Jördens <rj@quartiq.de>
178: Feature/iir tweaks r=ryan-summers a=jordens
Some minor IIR tweaks and a couple more relevant compiler flags.
**Untested on hardware.**
Co-authored-by: Robert Jördens <rj@quartiq.de>
* origin/master:
more nightly clippy lints
clippy lints
gha: clippy-check
build(deps): bump paste from 1.0.2 to 1.0.3
build(deps): bump panic-semihosting from 0.5.4 to 0.5.6
