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121 Commits

Author SHA1 Message Date
Robert Jördens d6de4b7028 fmt 2020-06-23 14:55:59 +02:00
Robert Jördens 5c4dec0870 dac clr/ldac: unwrap 2020-06-23 14:16:33 +02:00
Robert Jördens c326623818 dacs: clr_n high, ldac_n low 2020-06-23 14:13:55 +02:00
Robert Jördens 0a4112eb02 spi nss: very high speed 2020-06-22 22:55:18 +02:00
Ryan Summers 093dca5928 Updating stabilizer devices to utilize 0-based indexing 2020-06-22 08:31:09 +02:00
Ryan Summers a992d20414 Updating comment about debugging 2020-06-21 13:36:45 +02:00
Ryan Summers 7e279ed87c Re-enabling the HSE 2020-06-21 14:39:23 +02:00
Ryan Summers 78c9f6e686 Running rustfmt 2020-06-21 14:30:49 +02:00
Ryan Summers c6859d956e Allowing pounder to not be present 2020-06-20 16:43:07 +02:00
Robert Jördens f14f0e2ed1 style: implement a couple clippy suggestions [nfc] 2020-06-17 14:57:09 +02:00
Robert Jördens f70612f1be rtfm: migrate to rtic 2020-06-17 12:20:45 +02:00
Robert Jördens 54f51f9484 cargo fmt --all 2020-06-16 16:56:30 +02:00
Robert Jördens 09298bd534 structure: move stabilizer back to top, drop submodules 2020-06-16 16:56:30 +02:00
Ryan Summers 4dcf2b57bd Updating project structure 2020-06-08 09:36:28 +02:00
Ryan Summers ade06cbcb8 Updating AD9959 api 2020-06-04 16:56:04 +02:00
Ryan Summers beecbe3efc Refactoring AFE code 2020-06-03 17:36:43 +02:00
Ryan Summers b39de7f414 Adding support for QSPI operating continuously in 4-bit mode 2020-06-03 15:44:34 +02:00
Ryan Summers 13cd0ad636 Updating code after review feedback 2020-06-03 10:36:35 +02:00
Ryan Summers 6792ab5469 Adding input power measurement support 2020-04-29 13:00:29 +02:00
Ryan Summers 6f7bb0569c Adding stabilizer AFE gain amplifier controls 2020-04-29 11:59:04 +02:00
Ryan Summers 41f4960b93 Refactoring server into separate file 2020-04-28 19:26:43 +02:00
Ryan Summers b49596c96c Adding JSON API 2020-04-28 19:15:00 +02:00
Ryan Summers abf22676ce Adding refactor to support pounder hardware abstractions 2020-04-28 19:07:19 +02:00
Ryan Summers 87858a6e0a Fixing changes 2020-04-22 15:59:08 +02:00
Ryan Summers c6eb4d1757 Adding functional baseline HAL conversion 2020-04-22 15:50:07 +02:00
Ryan Summers 3962f7eb68 Adding WIP updates to SPI functionality 2020-04-22 13:36:51 +02:00
Ryan Summers d700935246 Adding WIP updates to HAL API 2020-04-21 19:02:52 +02:00
Ryan Summers 820a37a625 Refactoring branches 2020-04-19 13:37:03 +02:00
Ryan Summers ce9ae48f2a Adding WIP update to use HAL 2020-04-18 10:54:55 +02:00
Robert Jördens 2001149eda fmt 2020-02-14 15:06:50 +01:00
Robert Jördens 75eb4954b1 board: dma documentation 2020-02-14 12:26:16 +01:00
Robert Jördens 8b26996ecf board: dma.st.ndtr.ndt.bits is safe 2020-02-14 09:44:09 +00:00
Robert Jördens 57c9f90f69 board: fix unicode 2019-11-24 15:11:53 +01:00
Robert Jördens b34fdf7c48 rustfmt: run 2019-11-24 15:10:01 +01:00
Robert Jördens 8c2c0a2027 clippy: allow missing safety doc (rtfm) 2019-11-24 15:04:29 +01:00
Robert Jördens bda0ca26fb i2c/eeprom: lint 2019-11-24 14:55:20 +01:00
bors[bot] d2f8b60c27
Merge #65 
65: Tim2 late enable r=jordens a=jordens

does this work for you @cjbe?

bors r+

Co-authored-by: Robert Jördens <rj@quartiq.de>
 2019-11-24 13:33:50 +00:00
Robert Jördens 1140b4fb76 board: enable TIM2 late 
This was triggered by moving log_init and adding i2c_init on top of
the existing ethernet setup/init after the timer setup and enable.
Thanks @cjbe for debugging.

Also move the RCC peripheral enable calls out of i2c and eth setup.

close #55
supersedes #62
 2019-11-24 14:26:27 +01:00
bors[bot] 3cf4f2690c
Merge #64 
64: boards.rs: dos2unix r=jordens a=jordens

bors r+

@cjbe heads up

Co-authored-by: Robert Jördens <rj@quartiq.de>
 2019-11-24 13:25:08 +00:00
Robert Jördens 8e84e61ff3 boards.rs: dos2unix 2019-11-24 14:15:11 +01:00
Robert Jördens bf65b5f14a default to k_p=1 on boot 2019-11-24 13:10:01 +00:00
Chris Ballance ab1735950b fix memory safety issue in ethernet interface (closes #33) 
The CPU is allowed to access normal memory writes out-of-order. Here
the write to the OWN flag in the DMA descriptor (normal memory) was
placed after the DMA tail pointer advance (in device memory, so not
reorderable). This meant the ethernet DMA engine stalled as it saw
a descriptor it did not own, and only restarted and sent the packet
when the next packet was released.

This fix will work as long as the CPU data cache is disabled. If we
want to enable the cache, the simplest method would be to mark SRAM3
as uncacheable via the MPU.
 2019-11-16 03:25:42 +00:00
Chris Ballance d7f46c1f12 factor CPU and board-specific initialisation out of main (NFC) 2019-11-13 22:13:04 +00:00
David Nadlinger 2297286360 Fix TCP command interface rx buffer wrapping 
Previously, if a message spanned the end of the
receive ring buffer, the last byte in the buffer
would be missing from the to-be-decoded message,
leading to a parse error or panic.

With this commit, >3M commands were exchanged
over one socket without further issues.
 2019-11-13 01:50:18 +00:00
bors[bot] 39cb1afcfd
Merge #48 
48: remove unused code, deny warnings r=jordens a=jordens

bors r+

Co-authored-by: Robert Jördens <rj@quartiq.de>
 2019-11-11 11:20:53 +00:00
Robert Jördens 0b4f7c9201 remove unused code, deny warnings 2019-11-11 12:04:50 +01:00
Robert Jördens 65cf0c1594 rcc: pac 0.9 renames 2019-11-11 11:46:07 +01:00
Robert Jördens 17012621dd use stable rust (1.38.0) 2019-10-22 13:43:49 +00:00
Sebastien Bourdeauducq 80052f089b fix Unix permissions 2019-09-13 13:52:24 +08:00
Chris Ballance 1f1e588744 fix system time counter 
The CYCCNT module used to calculate the system
time counts every processor clock cycle =
400 MHz.
 2019-09-12 00:35:00 +01:00