diff --git a/dsp/benches/micro.rs b/dsp/benches/micro.rs index 0902a4c..22a2540 100644 --- a/dsp/benches/micro.rs +++ b/dsp/benches/micro.rs @@ -67,7 +67,7 @@ fn iir_bench() { let mut xy = iir::Vec5::default(); println!( "int::IIR::update(s, x): {}", - bench_env(0.32241, |x| dut.update(&mut xy, *x)) + bench_env(0.32241, |x| dut.update(&mut xy, *x, true)) ); } diff --git a/dsp/src/iir.rs b/dsp/src/iir.rs index ee9639e..a6af191 100644 --- a/dsp/src/iir.rs +++ b/dsp/src/iir.rs @@ -117,7 +117,7 @@ impl IIR { /// # Arguments /// * `xy` - Current filter state. /// * `x0` - New input. - pub fn update(&self, xy: &mut Vec5, x0: f32) -> f32 { + pub fn update(&self, xy: &mut Vec5, x0: f32, hold: bool) -> f32 { let n = self.ba.len(); debug_assert!(xy.len() == n); // `xy` contains x0 x1 y0 y1 y2 @@ -128,7 +128,11 @@ impl IIR { // Store x0 x0 x1 x2 y1 y2 xy[0] = x0; // Compute y0 by multiply-accumulate - let y0 = macc(self.y_offset, xy, &self.ba); + let y0 = if hold { + xy[n / 2 + 1] + } else { + macc(self.y_offset, xy, &self.ba) + }; // Limit y0 let y0 = max(self.y_min, min(self.y_max, y0)); // Store y0 x0 x1 y0 y1 y2 diff --git a/src/bin/dual-iir.rs b/src/bin/dual-iir.rs index 0e2215b..cac6f45 100644 --- a/src/bin/dual-iir.rs +++ b/src/bin/dual-iir.rs @@ -2,8 +2,6 @@ #![no_std] #![no_main] -use stm32h7xx_hal as hal; - use stabilizer::{hardware, net}; use miniconf::Miniconf; @@ -11,7 +9,8 @@ use serde::Deserialize; use dsp::iir; use hardware::{ - Adc0Input, Adc1Input, AfeGain, Dac0Output, Dac1Output, AFE0, AFE1, + Adc0Input, Adc1Input, AfeGain, Dac0Output, Dac1Output, DigitalInput1, + InputPin, AFE0, AFE1, }; use net::{Action, MqttSettings}; @@ -21,10 +20,12 @@ const SCALE: f32 = i16::MAX as _; // The number of cascaded IIR biquads per channel. Select 1 or 2! const IIR_CASCADE_LENGTH: usize = 1; -#[derive(Debug, Deserialize, Miniconf)] +#[derive(Clone, Copy, Debug, Deserialize, Miniconf)] pub struct Settings { afe: [AfeGain; 2], iir_ch: [[iir::IIR; IIR_CASCADE_LENGTH]; 2], + allow_hold: bool, + force_hold: bool, } impl Default for Settings { @@ -32,6 +33,8 @@ impl Default for Settings { Self { afe: [AfeGain::G1, AfeGain::G1], iir_ch: [[iir::IIR::new(1., -SCALE, SCALE); IIR_CASCADE_LENGTH]; 2], + allow_hold: false, + force_hold: false, } } } @@ -40,6 +43,7 @@ impl Default for Settings { const APP: () = { struct Resources { afes: (AFE0, AFE1), + digital_input1: DigitalInput1, adcs: (Adc0Input, Adc1Input), dacs: (Dac0Output, Dac1Output), mqtt_settings: MqttSettings, @@ -47,11 +51,10 @@ const APP: () = { // Format: iir_state[ch][cascade-no][coeff] #[init([[[0.; 5]; IIR_CASCADE_LENGTH]; 2])] iir_state: [[iir::Vec5; IIR_CASCADE_LENGTH]; 2], - #[init([[iir::IIR::new(1., -SCALE, SCALE); IIR_CASCADE_LENGTH]; 2])] - iir_ch: [[iir::IIR; IIR_CASCADE_LENGTH]; 2], + settings: Settings, } - #[init] + #[init(spawn=[settings_update])] fn init(c: init::Context) -> init::LateResources { // Configure the microcontroller let (mut stabilizer, _pounder) = hardware::setup(c.core, c.device); @@ -64,6 +67,9 @@ const APP: () = { stabilizer.cycle_counter, ); + // Spawn a settings update for default settings. + c.spawn.settings_update().unwrap(); + // Enable ADC/DAC events stabilizer.adcs.0.start(); stabilizer.adcs.1.start(); @@ -78,6 +84,8 @@ const APP: () = { adcs: stabilizer.adcs, dacs: stabilizer.dacs, mqtt_settings, + digital_input1: stabilizer.digital_inputs.1, + settings: Settings::default(), } } @@ -97,7 +105,7 @@ const APP: () = { /// /// Because the ADC and DAC operate at the same rate, these two constraints actually implement /// the same time bounds, meeting one also means the other is also met. - #[task(binds=DMA1_STR4, resources=[adcs, dacs, iir_state, iir_ch], priority=2)] + #[task(binds=DMA1_STR4, resources=[adcs, digital_input1, dacs, iir_state, settings], priority=2)] fn process(c: process::Context) { let adc_samples = [ c.resources.adcs.0.acquire_buffer(), @@ -109,13 +117,19 @@ const APP: () = { c.resources.dacs.1.acquire_buffer(), ]; + let hold = c.resources.settings.force_hold + || (c.resources.digital_input1.is_high().unwrap() + && c.resources.settings.allow_hold); + for channel in 0..adc_samples.len() { for sample in 0..adc_samples[0].len() { - let x = f32::from(adc_samples[channel][sample] as i16); - let mut y = x; + let mut y = f32::from(adc_samples[channel][sample] as i16); for i in 0..c.resources.iir_state[channel].len() { - y = c.resources.iir_ch[channel][i] - .update(&mut c.resources.iir_state[channel][i], y); + y = c.resources.settings.iir_ch[channel][i].update( + &mut c.resources.iir_state[channel][i], + y, + hold, + ); } // Note(unsafe): The filter limits ensure that the value is in range. // The truncation introduces 1/2 LSB distortion. @@ -139,12 +153,12 @@ const APP: () = { } } - #[task(priority = 1, resources=[mqtt_settings, afes, iir_ch])] + #[task(priority = 1, resources=[mqtt_settings, afes, settings])] fn settings_update(mut c: settings_update::Context) { let settings = &c.resources.mqtt_settings.mqtt.settings; // Update the IIR channels. - c.resources.iir_ch.lock(|iir| *iir = settings.iir_ch); + c.resources.settings.lock(|current| *current = *settings); // Update AFEs c.resources.afes.0.set_gain(settings.afe[0]); @@ -153,7 +167,7 @@ const APP: () = { #[task(binds = ETH, priority = 1)] fn eth(_: eth::Context) { - unsafe { hal::ethernet::interrupt_handler() } + unsafe { stm32h7xx_hal::ethernet::interrupt_handler() } } #[task(binds = SPI2, priority = 3)] diff --git a/src/hardware/configuration.rs b/src/hardware/configuration.rs index 82158f3..5fab968 100644 --- a/src/hardware/configuration.rs +++ b/src/hardware/configuration.rs @@ -13,8 +13,8 @@ use embedded_hal::digital::v2::{InputPin, OutputPin}; use super::{ adc, afe, cycle_counter::CycleCounter, dac, design_parameters, - digital_input_stamper, eeprom, pounder, timers, DdsOutput, EthernetPhy, - NetworkStack, AFE0, AFE1, + digital_input_stamper, eeprom, pounder, timers, DdsOutput, DigitalInput0, + DigitalInput1, EthernetPhy, NetworkStack, AFE0, AFE1, }; pub struct NetStorage { @@ -69,6 +69,7 @@ pub struct StabilizerDevices { pub timestamp_timer: timers::TimestampTimer, pub net: NetworkDevices, pub cycle_counter: CycleCounter, + pub digital_inputs: (DigitalInput0, DigitalInput1), } /// The available Pounder-specific hardware interfaces. @@ -439,6 +440,12 @@ pub fn setup( ) }; + let digital_inputs = { + let di0 = gpiog.pg9.into_floating_input(); + let di1 = gpioc.pc15.into_floating_input(); + (di0, di1) + }; + let mut eeprom_i2c = { let sda = gpiof.pf0.into_alternate_af4().set_open_drain(); let scl = gpiof.pf1.into_alternate_af4().set_open_drain(); @@ -872,6 +879,7 @@ pub fn setup( adc_dac_timer: sampling_timer, timestamp_timer, cycle_counter, + digital_inputs, }; // info!("Version {} {}", build_info::PKG_VERSION, build_info::GIT_VERSION.unwrap()); diff --git a/src/hardware/mod.rs b/src/hardware/mod.rs index 60e7768..d3e5711 100644 --- a/src/hardware/mod.rs +++ b/src/hardware/mod.rs @@ -1,6 +1,9 @@ ///! Module for all hardware-specific setup of Stabilizer use stm32h7xx_hal as hal; +// Re-export for the DigitalInputs below: +pub use embedded_hal::digital::v2::InputPin; + #[cfg(feature = "semihosting")] use panic_semihosting as _; @@ -34,6 +37,14 @@ pub type AFE1 = afe::ProgrammableGainAmplifier< hal::gpio::gpiod::PD15>, >; +// Type alias for digital input 0 (DI0). +pub type DigitalInput0 = + hal::gpio::gpiog::PG9>; + +// Type alias for digital input 1 (DI1). +pub type DigitalInput1 = + hal::gpio::gpioc::PC15>; + pub type NetworkStack = smoltcp_nal::NetworkStack< 'static, 'static,