Update src/adc.rs

Co-authored-by: Robert Jördens <rj@quartiq.de>
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Ryan Summers 2021-01-12 06:54:16 -08:00 committed by GitHub
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///! Stabilizer ADC management interface
///!
///! The Stabilizer ADCs utilize three DMA channels: one to trigger sampling, one to collect
///! The Stabilizer ADCs utilize three DMA channels each: one to trigger sampling, one to collect
///! samples, and one to clear the EOT flag betwen samples. The SPI interfaces are configured
///! for receiver-only operation. A timer channel is
///! configured to generate a DMA write into the SPI CR1 register, which initiates a SPI transfer and