dma: implement overflow checking
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@ -810,7 +810,7 @@ dependencies = [
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[[package]]
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name = "stm32h7xx-hal"
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version = "0.9.0"
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source = "git+https://github.com/quartiq/stm32h7xx-hal.git?rev=cca4ecc#cca4ecc3e0cc8cb2f7a9652c4099d50b44977493"
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source = "git+https://github.com/quartiq/stm32h7xx-hal.git?rev=b0b8a93#b0b8a930b2c3bc5fcebc2e905b4c5e13360111a5"
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dependencies = [
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"bare-metal 1.0.0",
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"cast",
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@ -52,11 +52,12 @@ mcp23017 = "1.0"
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git = "https://github.com/quartiq/rtt-logger.git"
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rev = "70b0eb5"
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# fast double buffered DMA without poisoning and buffer swapping
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[dependencies.stm32h7xx-hal]
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features = ["stm32h743v", "rt", "unproven", "ethernet", "quadspi"]
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# version = "0.9.0"
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git = "https://github.com/quartiq/stm32h7xx-hal.git"
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rev = "cca4ecc"
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rev = "b0b8a93"
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# link.x section start/end
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[patch.crates-io.cortex-m-rt]
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@ -54,10 +54,10 @@ impl Default for Settings {
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macro_rules! flatten_closures {
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($fn:ident, $e:ident, $fun:block) => {
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$e.$fn(|$e| $fun )
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$e.$fn(|$e| $fun ).unwrap()
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};
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($fn:ident, $e:ident, $($es:ident),+, $fun:block) => {
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$e.$fn(|$e| flatten_closures!($fn, $($es),*, $fun))
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$e.$fn(|$e| flatten_closures!($fn, $($es),*, $fun)).unwrap()
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};
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}
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@ -74,7 +74,7 @@ use hal::dma::{
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config::Priority,
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dma::{DMAReq, DmaConfig},
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traits::TargetAddress,
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MemoryToPeripheral, PeripheralToMemory, Transfer,
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DMAError, MemoryToPeripheral, PeripheralToMemory, Transfer,
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};
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/// A type representing an ADC sample.
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@ -359,7 +359,7 @@ macro_rules! adc_input {
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///
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/// NOTE(unsafe): Memory safety and access ordering is not guaranteed
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/// (see the HAL DMA docs).
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pub fn with_buffer<F, R>(&mut self, f: F) -> R
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pub fn with_buffer<F, R>(&mut self, f: F) -> Result<R, DMAError>
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where
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F: FnOnce(&mut SampleBuffer) -> R,
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{
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@ -58,7 +58,7 @@ use super::timers;
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use hal::dma::{
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dma::{DMAReq, DmaConfig},
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traits::TargetAddress,
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MemoryToPeripheral, Transfer,
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DMAError, MemoryToPeripheral, Transfer,
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};
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// The following global buffers are used for the DAC code DMA transfers. Two buffers are used for
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@ -209,7 +209,7 @@ macro_rules! dac_output {
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///
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/// NOTE(unsafe): Memory safety and access ordering is not guaranteed
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/// (see the HAL DMA docs).
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pub fn with_buffer<F, R>(&mut self, f: F) -> R
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pub fn with_buffer<F, R>(&mut self, f: F) -> Result<R, DMAError>
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where
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F: FnOnce(&mut SampleBuffer) -> R,
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{
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@ -52,9 +52,11 @@
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///! compile-time-known register update sequence needed for the application, the serialization
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///! process can be done once and then register values can be written into a pre-computed serialized
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///! buffer to avoid the software overhead of much of the serialization process.
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use log::warn;
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use stm32h7xx_hal as hal;
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use super::{hrtimer::HighResTimerE, QspiInterface};
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use ad9959::{Channel, DdsConfig, ProfileSerializer};
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use stm32h7xx_hal as hal;
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/// The DDS profile update stream.
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pub struct DdsOutput {
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@ -11,6 +11,7 @@
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///! Respones to settings updates are sent without quality-of-service guarantees, so there's no
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///! guarantee that the requestee will be informed that settings have been applied.
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use heapless::String;
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use log::info;
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use super::{MqttMessage, NetworkReference, SettingsResponse, UpdateState};
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use crate::hardware::design_parameters::MQTT_BROKER;
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