From bf8b950fe6f2a9e4688db1cc3dc7e4b15d5511c7 Mon Sep 17 00:00:00 2001
From: Ryan Summers <ryan.summers@vertigo-designs.com>
Date: Tue, 24 Nov 2020 17:09:36 +0100
Subject: [PATCH] Moving constants to a new file

---
 src/design_parameters.rs |  6 ++++++
 src/main.rs              | 13 +++++++------
 2 files changed, 13 insertions(+), 6 deletions(-)
 create mode 100644 src/design_parameters.rs

diff --git a/src/design_parameters.rs b/src/design_parameters.rs
new file mode 100644
index 0000000..9835568
--- /dev/null
+++ b/src/design_parameters.rs
@@ -0,0 +1,6 @@
+/// The ADC setup time is the number of seconds after the CSn line goes low before the serial clock
+/// may begin. This is used for performing the internal ADC conversion.
+pub const ADC_SETUP_TIME: f32 = 220e-9;
+
+/// The maximum DAC/ADC serial clock line frequency. This is a hardware limit.
+pub const ADC_DAC_SCK_MHZ_MAX: u32 = 50;
diff --git a/src/main.rs b/src/main.rs
index e3ddbcf..ea6ed1c 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -63,6 +63,7 @@ static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
 mod adc;
 mod afe;
 mod dac;
+mod design_parameters;
 mod eeprom;
 mod pounder;
 mod sampling_timer;
@@ -299,12 +300,12 @@ const APP: () = {
                 })
                 .manage_cs()
                 .suspend_when_inactive()
-                .cs_delay(220e-9);
+                .cs_delay(design_parameters::ADC_SETUP_TIME);
 
                 let spi: hal::spi::Spi<_, _, u16> = dp.SPI2.spi(
                     (spi_sck, spi_miso, hal::spi::NoMosi),
                     config,
-                    50.mhz(),
+                    design_parameters::ADC_DAC_SCK_MHZ_MAX.mhz(),
                     ccdr.peripheral.SPI2,
                     &ccdr.clocks,
                 );
@@ -337,12 +338,12 @@ const APP: () = {
                 })
                 .manage_cs()
                 .suspend_when_inactive()
-                .cs_delay(220e-9);
+                .cs_delay(design_parameters::ADC_SETUP_TIME);
 
                 let spi: hal::spi::Spi<_, _, u16> = dp.SPI3.spi(
                     (spi_sck, spi_miso, hal::spi::NoMosi),
                     config,
-                    50.mhz(),
+                    design_parameters::ADC_DAC_SCK_MHZ_MAX.mhz(),
                     ccdr.peripheral.SPI3,
                     &ccdr.clocks,
                 );
@@ -392,7 +393,7 @@ const APP: () = {
                 dp.SPI4.spi(
                     (spi_sck, spi_miso, hal::spi::NoMosi),
                     config,
-                    50.mhz(),
+                    design_parameters::ADC_DAC_SCK_MHZ_MAX.mhz(),
                     ccdr.peripheral.SPI4,
                     &ccdr.clocks,
                 )
@@ -424,7 +425,7 @@ const APP: () = {
                 dp.SPI5.spi(
                     (spi_sck, spi_miso, hal::spi::NoMosi),
                     config,
-                    50.mhz(),
+                    design_parameters::ADC_DAC_SCK_MHZ_MAX.mhz(),
                     ccdr.peripheral.SPI5,
                     &ccdr.clocks,
                 )