diff --git a/ad9959/src/lib.rs b/ad9959/src/lib.rs index 6fdcefd..d12041c 100644 --- a/ad9959/src/lib.rs +++ b/ad9959/src/lib.rs @@ -571,59 +571,4 @@ where Ok(tuning_word as f64 * self.system_clock_frequency() / (1u64 << 32) as f64) } - - pub fn write_profile( - &mut self, - channel: Channel, - freq: f64, - turns: f32, - ) -> Result<(), Error> { - // The function for channel frequency is `f_out = FTW * f_s / 2^32`, where FTW is the - // frequency tuning word and f_s is the system clock rate. - let tuning_word: u32 = ((freq as f64 / self.system_clock_frequency()) - * 1u64.wrapping_shl(32) as f64) - as u32; - - let phase_offset: u16 = (turns * (1 << 14) as f32) as u16 & 0x3FFFu16; - - self.modify_channel_closure(channel, |interface| { - let mut data: [u8; 7] = [0; 7]; - data[0..2].copy_from_slice(&phase_offset.to_be_bytes()); - data[3] = Register::CFTW0 as u8; - data[4..7].copy_from_slice(&tuning_word.to_be_bytes()); - interface - .write(Register::CPOW0 as u8, &data) - .map_err(|_| Error::Interface) - })?; - - Ok(()) - } - - fn modify_channel_closure( - &mut self, - channel: Channel, - f: F, - ) -> Result<(), Error> - where - F: FnOnce(&mut INTERFACE) -> Result<(), Error>, - { - // Disable all other outputs so that we can update the configuration register of only the - // specified channel. - let mut csr: [u8; 1] = [0]; - self.interface - .read(Register::CSR as u8, &mut csr) - .map_err(|_| Error::Interface)?; - - let mut new_csr = csr; - new_csr[0].set_bits(4..8, 0); - new_csr[0].set_bit(4 + channel as usize, true); - - let result = f(&mut self.interface); - - self.interface - .write(Register::CSR as u8, &new_csr) - .map_err(|_| Error::Interface)?; - - result - } } diff --git a/src/main.rs b/src/main.rs index 61dcb7e..2b0e240 100644 --- a/src/main.rs +++ b/src/main.rs @@ -626,10 +626,10 @@ const APP: () = { // Configure ethernet pins. { // Reset the PHY before configuring pins. - //let mut eth_phy_nrst = gpioe.pe3.into_push_pull_output(); - //eth_phy_nrst.set_low().unwrap(); - //delay.delay_ms(200u8); - //eth_phy_nrst.set_high().unwrap(); + let mut eth_phy_nrst = gpioe.pe3.into_push_pull_output(); + eth_phy_nrst.set_low().unwrap(); + delay.delay_us(200u8); + eth_phy_nrst.set_high().unwrap(); let _rmii_ref_clk = gpioa .pa1 .into_alternate_af11() diff --git a/src/pounder/mod.rs b/src/pounder/mod.rs index 032b209..1288765 100644 --- a/src/pounder/mod.rs +++ b/src/pounder/mod.rs @@ -235,7 +235,7 @@ pub struct PounderDevices { hal::gpio::gpiog::PG7>, >, mcp23017: mcp23017::MCP23017>, - attenuator_spi: hal::spi::Spi, + attenuator_spi: hal::spi::Spi, adc1: hal::adc::Adc, adc2: hal::adc::Adc, adc1_in_p: hal::gpio::gpiof::PF11, @@ -262,7 +262,7 @@ where DELAY, hal::gpio::gpiog::PG7>, >, - attenuator_spi: hal::spi::Spi, + attenuator_spi: hal::spi::Spi, adc1: hal::adc::Adc, adc2: hal::adc::Adc, adc1_in_p: hal::gpio::gpiof::PF11, @@ -475,11 +475,10 @@ where state: ChannelState, ) -> Result<(), Error> { self.ad9959 - .write_profile( - channel.into(), - state.parameters.frequency, - state.parameters.phase_offset, - ) + .set_frequency(channel.into(), state.parameters.frequency) + .map_err(|_| Error::Dds)?; + self.ad9959 + .set_phase(channel.into(), state.parameters.phase_offset) .map_err(|_| Error::Dds)?; self.ad9959 .set_amplitude(channel.into(), state.parameters.amplitude)