From ab50f550623627d377a7fef7bc7dc0861bed4999 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Robert=20J=C3=B6rdens?= Date: Thu, 26 Nov 2020 15:41:19 +0100 Subject: [PATCH] adc/dac: docstrings --- src/adc.rs | 2 +- src/dac.rs | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/adc.rs b/src/adc.rs index b275d27..02f686f 100644 --- a/src/adc.rs +++ b/src/adc.rs @@ -55,7 +55,7 @@ macro_rules! adc_input { /// SPI is configured to operate using 16-bit transfer words. type MemSize = u16; - /// SPI DMA requests are generated whenever TIM2 CH1 comparison occurs. + /// SPI DMA requests are generated whenever TIM2 CHx ($dma_req) comparison occurs. const REQUEST_LINE: Option = Some(DMAReq::$dma_req as u8); /// Whenever the DMA request occurs, it should write into SPI's TX FIFO to start a DMA diff --git a/src/dac.rs b/src/dac.rs index 95ae8b0..c586e2f 100644 --- a/src/dac.rs +++ b/src/dac.rs @@ -41,7 +41,7 @@ macro_rules! dac_output { /// SPI is configured to operate using 16-bit transfer words. type MemSize = u16; - /// SPI DMA requests are generated whenever TIM2 CH3 comparison occurs. + /// SPI DMA requests are generated whenever TIM2 CHx ($dma_req) comparison occurs. const REQUEST_LINE: Option = Some(DMAReq::$dma_req as u8); /// Whenever the DMA request occurs, it should write into SPI's TX FIFO.