From 8ff8a4ce31054674bb617ce96a3ea34547aa2c7c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Robert=20J=C3=B6rdens?= <rj@quartiq.de>
Date: Wed, 17 Apr 2019 14:04:05 +0000
Subject: [PATCH] main: work around spi stall erratum and debug

---
 src/main.rs | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/main.rs b/src/main.rs
index 91ff3be..2131ae1 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -571,6 +571,12 @@ fn main() -> ! {
                &spi5.cr1 as *const _ as usize);
 
     rcc.apb1lenr.modify(|_, w| w.tim2en().set_bit());
+
+    // work around the SPI stall erratum
+    //let dbgmcu = dp.DBGMCU;
+    //dbgmcu.apb1lfz1.modify(|_, w| w.stop_tim2().set_bit());  // stop tim2 in debug
+    unsafe { ptr::write_volatile(0x5c00_103c as *mut usize, 0x0000_0001) };
+
     tim2_setup(&dp.TIM2);
 
     unsafe {