diff --git a/src/adc.rs b/src/adc.rs
index 6f7243c..9d344dc 100644
--- a/src/adc.rs
+++ b/src/adc.rs
@@ -242,6 +242,8 @@ impl Adc0Input {
         let next_buffer = self.next_buffer.take().unwrap();
 
         // Wait for the transfer to fully complete before continuing.
+        // Note: If a device hangs up, check that this conditional is passing correctly, as there is
+        // no time-out checks here in the interest of execution speed.
         while self.transfer.get_transfer_complete_flag() == false {}
 
         // Start the next transfer.
@@ -367,6 +369,8 @@ impl Adc1Input {
         let next_buffer = self.next_buffer.take().unwrap();
 
         // Wait for the transfer to fully complete before continuing.
+        // Note: If a device hangs up, check that this conditional is passing correctly, as there is
+        // no time-out checks here in the interest of execution speed.
         while self.transfer.get_transfer_complete_flag() == false {}
 
         // Start the next transfer.
diff --git a/src/main.rs b/src/main.rs
index ea6ed1c..ece4340 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -962,22 +962,22 @@ const APP: () = {
         unsafe { ethernet::interrupt_handler() }
     }
 
-    #[task(binds = SPI2, priority = 1)]
+    #[task(binds = SPI2, priority = 3)]
     fn spi2(_: spi2::Context) {
         panic!("ADC0 input overrun");
     }
 
-    #[task(binds = SPI3, priority = 1)]
+    #[task(binds = SPI3, priority = 3)]
     fn spi3(_: spi3::Context) {
         panic!("ADC0 input overrun");
     }
 
-    #[task(binds = SPI4, priority = 1)]
+    #[task(binds = SPI4, priority = 3)]
     fn spi4(_: spi4::Context) {
         panic!("DAC0 output error");
     }
 
-    #[task(binds = SPI5, priority = 1)]
+    #[task(binds = SPI5, priority = 3)]
     fn spi5(_: spi5::Context) {
         panic!("DAC1 output error");
     }