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dac tx: different work around

This commit is contained in:
Robert Jördens 2019-03-19 22:02:16 +00:00
parent 4ee7ccb762
commit 772b1b4101
1 changed files with 11 additions and 5 deletions
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16
src/main.rs
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@ -349,11 +349,9 @@ fn main() -> ! {
.mssi().bits(0) // master SS idle .mssi().bits(0) // master SS idle
}); });
spi2.cr2.modify(|_, w| unsafe { spi2.cr2.modify(|_, w| unsafe {
w.tsize().bits(0) // infinite w.tsize().bits(1)
}); });
spi2.cr1.write(|w| w.spe().set_bit()); spi2.cr1.write(|w| w.spe().set_bit());
// at least one SCK between EOT and CSTART
spi2.cr1.modify(|r, w| unsafe { w.bits(r.bits() | (1 << 9)) });
loop { loop {
#[cfg(feature = "bkpt")] #[cfg(feature = "bkpt")]
@ -363,14 +361,22 @@ fn main() -> ! {
spi1.cr1.modify(|r, w| unsafe { w.bits(r.bits() | (1 << 9)) }); spi1.cr1.modify(|r, w| unsafe { w.bits(r.bits() | (1 << 9)) });
while spi1.sr.read().eot().bit_is_clear() {} while spi1.sr.read().eot().bit_is_clear() {}
spi1.ifcr.write(|w| w.eotc().set_bit()); spi1.ifcr.write(|w| w.eotc().set_bit());
while spi1.sr.read().rxp().bit_is_clear() {} if spi1.sr.read().rxp().bit_is_clear() {
continue;
}
let a = spi1.rxdr.read().rxdr().bits() as i16; let a = spi1.rxdr.read().rxdr().bits() as i16;
let d = (a as u16) ^ 0x8000; let d = (a as u16) ^ 0x8000;
while spi2.sr.read().txp().bit_is_clear() {} if spi2.sr.read().txp().bit_is_clear() {
continue;
}
let txdr = &spi2.txdr as *const _ as *mut u16; let txdr = &spi2.txdr as *const _ as *mut u16;
unsafe { ptr::write_volatile(txdr, d) }; unsafe { ptr::write_volatile(txdr, d) };
// at least one SCK between EOT and CSTART
spi2.cr1.modify(|r, w| unsafe { w.bits(r.bits() | (1 << 9)) });
while spi2.sr.read().txc().bit_is_clear() {} while spi2.sr.read().txc().bit_is_clear() {}
while spi2.sr.read().eot().bit_is_clear() {}
spi1.ifcr.write(|w| w.eotc().set_bit());
#[cfg(feature = "bkpt")] #[cfg(feature = "bkpt")]
cortex_m::asm::bkpt(); cortex_m::asm::bkpt();