diff --git a/src/afe.rs b/src/afe.rs new file mode 100644 index 0000000..9238393 --- /dev/null +++ b/src/afe.rs @@ -0,0 +1,71 @@ +use embedded_hal; + +#[derive(Copy, Clone, Debug)] +pub enum Gain { + G1 = 0b00, + G2 = 0b01, + G5 = 0b10, + G10 = 0b11 +} + +pub struct ProgrammableGainAmplifier { + a0: A0, + a1: A1 +} + +impl ProgrammableGainAmplifier +where + A0: embedded_hal::digital::v2::StatefulOutputPin, + A0::Error: core::fmt::Debug, + A1: embedded_hal::digital::v2::StatefulOutputPin, + A1::Error: core::fmt::Debug, +{ + pub fn new(a0: A0, a1: A1) -> Self + { + let mut afe = Self { a0: a0, a1: a1}; + + afe.set_gain(Gain::G1); + + afe + } + + pub fn set_gain(&mut self, gain: Gain) { + match gain { + Gain::G1 => { + self.a0.set_low().unwrap(); + self.a1.set_low().unwrap(); + }, + Gain::G2 => { + self.a0.set_high().unwrap(); + self.a1.set_low().unwrap(); + }, + Gain::G5 => { + self.a0.set_low().unwrap(); + self.a1.set_high().unwrap(); + }, + Gain::G10 => { + self.a0.set_high().unwrap(); + self.a1.set_high().unwrap(); + }, + } + } + + pub fn get_gain(&self) -> Gain { + let lsb_set = self.a0.is_set_high().unwrap(); + let msb_set = self.a1.is_set_high().unwrap(); + + if msb_set { + if lsb_set { + Gain::G10 + } else { + Gain::G5 + } + } else { + if lsb_set { + Gain::G2 + } else { + Gain::G1 + } + } + } +} diff --git a/src/main.rs b/src/main.rs index 3da7786..d67ed37 100644 --- a/src/main.rs +++ b/src/main.rs @@ -53,6 +53,7 @@ static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new(); mod eth; mod pounder; mod server; +mod afe; mod iir; use iir::*; @@ -102,14 +103,24 @@ const SCALE: f32 = ((1 << 15) - 1) as f32; const TCP_RX_BUFFER_SIZE: usize = 8192; const TCP_TX_BUFFER_SIZE: usize = 8192; +type AFE1 = afe::ProgrammableGainAmplifier< + hal::gpio::gpiof::PF2>, + hal::gpio::gpiof::PF5>>; + +type AFE2 = afe::ProgrammableGainAmplifier< + hal::gpio::gpiod::PD14>, + hal::gpio::gpiod::PD15>>; + #[rtfm::app(device = stm32h7xx_hal::stm32, peripherals = true, monotonic = rtfm::cyccnt::CYCCNT)] const APP: () = { struct Resources { adc1: hal::spi::Spi, dac1: hal::spi::Spi, + _afe1: AFE1, adc2: hal::spi::Spi, dac2: hal::spi::Spi, + _afe2: AFE2, eeprom_i2c: hal::i2c::I2c, @@ -163,6 +174,18 @@ const APP: () = { let gpiof = dp.GPIOF.split(&mut clocks.ahb4); let gpiog = dp.GPIOG.split(&mut clocks.ahb4); + let afe1 = { + let a0_pin = gpiof.pf2.into_push_pull_output(); + let a1_pin = gpiof.pf5.into_push_pull_output(); + afe::ProgrammableGainAmplifier::new(a0_pin, a1_pin) + }; + + let afe2 = { + let a0_pin = gpiod.pd14.into_push_pull_output(); + let a1_pin = gpiod.pd15.into_push_pull_output(); + afe::ProgrammableGainAmplifier::new(a0_pin, a1_pin) + }; + // Configure the SPI interfaces to the ADCs and DACs. let adc1_spi = { let spi_miso = gpiob.pb14.into_alternate_af5().set_speed(hal::gpio::Speed::VeryHigh); @@ -398,6 +421,8 @@ const APP: () = { dac1: dac1_spi, adc2: adc2_spi, dac2: dac2_spi, + _afe1: afe1, + _afe2: afe2, dbg_pin: debug_pin, dac_pin: dac_pin,