Adding initial working proof of concept
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9cca1497b7
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@ -14,9 +14,9 @@ use stabilizer::{
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dac::{Dac0Output, Dac1Output, DacCode},
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embedded_hal::digital::v2::InputPin,
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hal,
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signal_generator::{self, SignalGenerator},
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system_timer::SystemTimer,
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DigitalInput0, DigitalInput1, AFE0, AFE1,
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signal_generator::SignalGenerator,
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},
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net::{
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data_stream::{BlockGenerator, StreamTarget},
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@ -40,11 +40,12 @@ pub struct Settings {
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force_hold: bool,
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telemetry_period: u16,
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stream_target: StreamTarget,
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signal_generator: signal_generator::Config;
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signal_generator: signal_generator::Config,
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output_mode: [OutputMode; 2],
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}
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pub struct OutputMode {
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#[derive(Copy, Clone, Debug, PartialEq, Deserialize, Miniconf)]
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pub enum OutputMode {
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IirFilter,
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SignalGenerator,
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}
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@ -70,6 +71,7 @@ impl Default for Settings {
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signal_generator: signal_generator::Config::default(),
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stream_target: StreamTarget::default(),
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output_mode: [OutputMode::IirFilter, OutputMode::IirFilter],
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}
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}
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}
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@ -83,6 +85,7 @@ const APP: () = {
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dacs: (Dac0Output, Dac1Output),
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network: NetworkUsers<Settings, Telemetry>,
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generator: BlockGenerator,
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signal_generator: SignalGenerator,
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settings: Settings,
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telemetry: TelemetryBuffer,
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@ -123,6 +126,8 @@ const APP: () = {
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// Start sampling ADCs.
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stabilizer.adc_dac_timer.start();
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let settings = Settings::default();
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init::LateResources {
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afes: stabilizer.afes,
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adcs: stabilizer.adcs,
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@ -131,7 +136,8 @@ const APP: () = {
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network,
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digital_inputs: stabilizer.digital_inputs,
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telemetry: TelemetryBuffer::default(),
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settings: Settings::default(),
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settings,
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signal_generator: SignalGenerator::new(settings.signal_generator),
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}
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}
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@ -151,7 +157,7 @@ const APP: () = {
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///
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/// Because the ADC and DAC operate at the same rate, these two constraints actually implement
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/// the same time bounds, meeting one also means the other is also met.
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#[task(binds=DMA1_STR4, resources=[adcs, digital_inputs, dacs, iir_state, settings, telemetry, generator], priority=2)]
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#[task(binds=DMA1_STR4, resources=[adcs, digital_inputs, dacs, iir_state, settings, signal_generator, telemetry, generator], priority=2)]
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#[inline(never)]
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#[link_section = ".itcm.process"]
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fn process(mut c: process::Context) {
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@ -163,6 +169,7 @@ const APP: () = {
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ref mut iir_state,
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ref mut telemetry,
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ref mut generator,
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ref mut signal_generator,
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} = c.resources;
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let digital_inputs = [
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@ -207,17 +214,25 @@ const APP: () = {
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// Do not generate the samples twice, or we may mess up phasing of the
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// signal generator. Instead, copy the previously-generated signal.
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// TODO: Is there a nicer way we can handle this edge case?
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if (channel == 1) && settings.output_mode[0] == OutputMode::SignalGenerator {
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adc_samples[1].copy_from_slice(adc_samples[0]);
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if (channel == 1)
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&& settings.output_mode[0]
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== OutputMode::SignalGenerator
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{
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*dac_samples[1] = *dac_samples[0];
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} else {
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signal_generator.generate(&mut adc_samples[channel]);
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signal_generator
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.generate(&mut dac_samples[channel][..]);
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}
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}
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}
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}
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if !settings.output_mode.iter().any(|&mode| mode == OutputMode::SignalGenerator) {
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signal_generator.skip(adc_samples[0].len());
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if !settings
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.output_mode
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.iter()
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.any(|&mode| mode == OutputMode::SignalGenerator)
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{
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signal_generator.skip(adc_samples[0].len() as u32);
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}
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// Stream the data.
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@ -248,7 +263,7 @@ const APP: () = {
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}
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}
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#[task(priority = 1, resources=[network, afes, settings])]
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#[task(priority = 1, resources=[network, afes, settings, signal_generator])]
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fn settings_update(mut c: settings_update::Context) {
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// Update the IIR channels.
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let settings = c.resources.network.miniconf.settings();
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@ -259,7 +274,9 @@ const APP: () = {
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c.resources.afes.1.set_gain(settings.afe[1]);
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// Update the signal generator
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c.resources.signal_generator.update_waveform(settings.signal_generator);
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c.resources.signal_generator.lock(|generator| {
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generator.update_waveform(settings.signal_generator)
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});
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let target = settings.stream_target.into();
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c.resources.network.direct_stream(target);
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@ -96,7 +96,7 @@ const APP: () = {
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telemetry: TelemetryBuffer,
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digital_inputs: (DigitalInput0, DigitalInput1),
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generator: BlockGenerator,
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signal_generator: signal_generator::Generator,
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signal_generator: signal_generator::SignalGenerator,
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timestamper: InputStamper,
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pll: RPLL,
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@ -156,7 +156,7 @@ const APP: () = {
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digital_inputs: stabilizer.digital_inputs,
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timestamper: stabilizer.timestamper,
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telemetry: TelemetryBuffer::default(),
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signal_generator: signal_generator::Generator::new(
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signal_generator: signal_generator::SignalGenerator::new(
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signal_generator::Config {
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period: design_parameters::SAMPLE_BUFFER_SIZE as u32,
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symmetry: 0.5,
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@ -1,11 +1,15 @@
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#[derive(Copy, Clone, Debug)]
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use crate::hardware::dac::DacCode;
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use miniconf::Miniconf;
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use serde::Deserialize;
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#[derive(Copy, Clone, Debug, Deserialize, Miniconf)]
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pub enum Signal {
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Sine,
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Square,
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Triangle,
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}
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#[derive(Copy, Clone, Debug)]
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#[derive(Copy, Clone, Debug, Miniconf, Deserialize)]
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pub struct Config {
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// TODO: Should period be specified in Hz?
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pub period: u32,
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@ -102,19 +106,21 @@ impl SignalGenerator {
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///
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/// # Args
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/// * `samples` - The location to store generated values into.
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pub fn generate(&mut self, samples: &mut [i16]) {
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pub fn generate(&mut self, samples: &mut [u16]) {
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for sample in samples.iter_mut() {
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*sample = self.next();
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*sample = DacCode::from(self.next()).0;
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}
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}
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/// Skip `count` elements of the generator
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pub fn skip(&mut self, count: usize) {
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pub fn skip(&mut self, count: u32) {
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let index = self.index.wrapping_add(count);
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// If we skip past the period of the signal, apply any pending config.
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if index > self.config.period && let Some(config) = self.pendig_config.take() {
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self.config = config;
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if index > self.config.period {
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if let Some(config) = self.pending_config.take() {
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self.config = config;
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}
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}
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self.index = index % self.config.period;
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@ -140,25 +146,37 @@ impl SignalGenerator {
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}
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Signal::Triangle => {
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if phase < self.config.phase_symmetry {
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let duration_of_phase = (self.config.phase_symmetry.wrapping_sub(i32::MIN) >> 16) as u16;
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let phase_progress = (phase.wrapping_sub(i32::MIN) >> 16) as u16;
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let duration_of_phase =
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(self.config.phase_symmetry.wrapping_sub(i32::MIN)
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>> 16) as u16;
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let phase_progress =
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(phase.wrapping_sub(i32::MIN) >> 16) as u16;
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if duration_of_phase == 0 {
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i16::MIN
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} else {
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i16::MIN.wrapping_add((u16::MAX as u32 * phase_progress as u32 /
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duration_of_phase as u32) as i16)
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i16::MIN.wrapping_add(
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(u16::MAX as u32 * phase_progress as u32
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/ duration_of_phase as u32)
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as i16,
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)
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}
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} else {
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let duration_of_phase = (i32::MAX.wrapping_sub(self.config.phase_symmetry) >> 16) as u16;
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let phase_progress = (phase.wrapping_sub(self.config.phase_symmetry) >> 16) as
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u16;
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let duration_of_phase =
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(i32::MAX.wrapping_sub(self.config.phase_symmetry)
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>> 16) as u16;
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let phase_progress = (phase
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.wrapping_sub(self.config.phase_symmetry)
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>> 16) as u16;
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if duration_of_phase == 0 {
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i16::MAX
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} else {
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i16::MAX.wrapping_sub((u16::MAX as u32 * phase_progress as u32 / duration_of_phase as u32) as i16)
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i16::MAX.wrapping_sub(
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(u16::MAX as u32 * phase_progress as u32
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/ duration_of_phase as u32)
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as i16,
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)
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}
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}
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}
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