diff --git a/.cargo/config b/.cargo/config
index 049bd28..82780fa 100644
--- a/.cargo/config
+++ b/.cargo/config
@@ -1,16 +1,10 @@
 [target.'cfg(all(target_arch = "arm", target_os = "none"))']
-# runner = "probe-run --chip STM32H743ZITx --speed 30000"
-runner = "gdb-multiarch -q -x openocd.gdb"
+runner = "probe-run --chip STM32H743ZITx --speed 30000"
+# runner = "gdb-multiarch -q -x openocd.gdb"
 rustflags = [
     "-C", "link-arg=-Tlink.x",
-# The target (below) defaults to cortex-m4
-# There currently are two different options to go beyond that:
-# 1. cortex-m7 has the right flags and instructions (FPU) but no instruction schedule yet
-#    "-C", "target-cpu=cortex-m7",
-# 2. cortex-m4 with the additional fpv5 instructions and a potentially
-# better-than-nothing instruction schedule
-    "-C", "target-feature=+fp-armv8d16",
-# When combined they are equivalent to (1) alone
+    "-C", "link-arg=--nmagic",
+    "-C", "target-cpu=cortex-m7",
 ]
 
 [build]
diff --git a/CHANGELOG.md b/CHANGELOG.md
index 5f100ea..13f765e 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -14,8 +14,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Changed
 
-* Const generics bumping the MSRV to 1.51.0
+* Const generics, bumping the MSRV to 1.51.0
 * `lockin-internal` and `lockin-external` have been merged into `lockin`
+* Default target CPU is cortex-m7, effective bumping the MSRV to 1.52.0
 
 ### Fixed