Update src/digital_input_stamper.rs
Co-authored-by: Robert Jördens <rj@quartiq.de>
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///! # Design
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///! # Design
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///! An input capture channel is configured on DI0 and fed into TIM5's capture channel 4. TIM5 is
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///! An input capture channel is configured on DI0 and fed into TIM5's capture channel 4. TIM5 is
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///! then run in a free-running mode with a configured frequency and period. Whenever an edge on DI0
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///! then run in a free-running mode with a configured frequency and period. Whenever an edge on DI0
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///! triggers, the current TIM5 capture value is recorded as a timestamp. This timestamp can be
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///! triggers, the current TIM5 counter value is captured and recorded as a timestamp. This timestamp can be
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///! either directly read from the timer channel or can be collected asynchronously via DMA
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///! either directly read from the timer channel or can be collected asynchronously via DMA
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///! collection.
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///! collection.
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///!
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///!
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