Update src/digital_input_stamper.rs

Co-authored-by: Robert Jördens <rj@quartiq.de>
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Ryan Summers 2020-12-08 15:15:51 +01:00 committed by GitHub
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@ -9,7 +9,7 @@
///! # Design
///! An input capture channel is configured on DI0 and fed into TIM5's capture channel 4. TIM5 is
///! then run in a free-running mode with a configured frequency and period. Whenever an edge on DI0
///! triggers, the current TIM5 capture value is recorded as a timestamp. This timestamp can be
///! triggers, the current TIM5 counter value is captured and recorded as a timestamp. This timestamp can be
///! either directly read from the timer channel or can be collected asynchronously via DMA
///! collection.
///!