From f4c6e07a381352a35a12e0b42ace635100fde958 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Robert=20J=C3=B6rdens?= Date: Sat, 27 Feb 2021 14:54:46 +0100 Subject: [PATCH 1/2] dsp/bench: add lowpass --- dsp/benches/micro.rs | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/dsp/benches/micro.rs b/dsp/benches/micro.rs index 1f2cc1f..b3c1549 100644 --- a/dsp/benches/micro.rs +++ b/dsp/benches/micro.rs @@ -1,8 +1,9 @@ use core::f32::consts::PI; -use dsp::{atan2, cossin}; -use dsp::{iir, iir_int}; -use dsp::{PLL, RPLL}; + use easybench::bench_env; +use generic_array::typenum::U4; + +use dsp::{Lowpass, atan2, cossin, iir, iir_int, PLL, RPLL}; fn atan2_bench() { let xi = (10 << 16) as i32; @@ -70,6 +71,18 @@ fn iir_bench() { ); } +fn lowpass_bench() { + let mut dut = Lowpass::::default(); + println!( + "Lowpass::::update(x, k): {}", + bench_env((0x32421, 14), |(x, k)| dut.update(*x, *k)) + ); + println!( + "Lowpass::::update(x, 14): {}", + bench_env(0x32421, |x| dut.update(*x, 14)) + ); +} + fn main() { atan2_bench(); cossin_bench(); @@ -77,4 +90,5 @@ fn main() { pll_bench(); iir_int_bench(); iir_bench(); + lowpass_bench(); } From b2d6b5c10c74f1ddad710588baa40892870ab0ee Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Robert=20J=C3=B6rdens?= Date: Sat, 27 Feb 2021 15:02:16 +0100 Subject: [PATCH 2/2] dsp/bench: fmt --- dsp/benches/micro.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dsp/benches/micro.rs b/dsp/benches/micro.rs index b3c1549..0902a4c 100644 --- a/dsp/benches/micro.rs +++ b/dsp/benches/micro.rs @@ -3,7 +3,7 @@ use core::f32::consts::PI; use easybench::bench_env; use generic_array::typenum::U4; -use dsp::{Lowpass, atan2, cossin, iir, iir_int, PLL, RPLL}; +use dsp::{atan2, cossin, iir, iir_int, Lowpass, PLL, RPLL}; fn atan2_bench() { let xi = (10 << 16) as i32;