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Merge #412 

412: Updating IO expander to be configured before AD9959 r=jordens a=ryan-summers

This PR fixes #411 by refactoring the code to initialize the IO expander before the AD9959. It was discovered that the oscillator to the AD9959 may not be enabled due to a floating MOSFET gate. This was causing register configs to fail.

The fix configures the IO expander first to ensure that the OSC_ENn signal is de-asserted to enable the AD9959 oscillator.

Co-authored-by: Ryan Summers <ryan.summers@vertigo-designs.com>
master
bors[bot] 2021-07-21 10:34:09 +00:00 committed by GitHub
parent 8f7dcf32cb 5d141d9f58
commit 37fa1a0465
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 73 additions and 72 deletions
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145
src/hardware/setup.rs
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@ -769,78 +769,6 @@ pub fn setup(
delay.delay_ms(2u8);
let pounder = if pounder_pgood.is_high().unwrap() {
log::info!("Found Pounder");
let ad9959 = {
let qspi_interface = {
// Instantiate the QUADSPI pins and peripheral interface.
let qspi_pins = {
let _qspi_ncs = gpioc
.pc11
.into_alternate_af9()
.set_speed(hal::gpio::Speed::VeryHigh);
let clk = gpiob
.pb2
.into_alternate_af9()
.set_speed(hal::gpio::Speed::VeryHigh);
let io0 = gpioe
.pe7
.into_alternate_af10()
.set_speed(hal::gpio::Speed::VeryHigh);
let io1 = gpioe
.pe8
.into_alternate_af10()
.set_speed(hal::gpio::Speed::VeryHigh);
let io2 = gpioe
.pe9
.into_alternate_af10()
.set_speed(hal::gpio::Speed::VeryHigh);
let io3 = gpioe
.pe10
.into_alternate_af10()
.set_speed(hal::gpio::Speed::VeryHigh);
(clk, io0, io1, io2, io3)
};
let qspi = hal::qspi::Qspi::bank2(
device.QUADSPI,
qspi_pins,
design_parameters::POUNDER_QSPI_FREQUENCY,
&ccdr.clocks,
ccdr.peripheral.QSPI,
);
pounder::QspiInterface::new(qspi).unwrap()
};
#[cfg(feature = "pounder_v1_1")]
let reset_pin = gpiog.pg6.into_push_pull_output();
#[cfg(not(feature = "pounder_v1_1"))]
let reset_pin = gpioa.pa0.into_push_pull_output();
let mut io_update = gpiog.pg7.into_push_pull_output();
let ref_clk: hal::time::Hertz =
design_parameters::DDS_REF_CLK.into();
let mut ad9959 = ad9959::Ad9959::new(
qspi_interface,
reset_pin,
&mut io_update,
&mut delay,
ad9959::Mode::FourBitSerial,
ref_clk.0 as f32,
design_parameters::DDS_MULTIPLIER,
)
.unwrap();
ad9959.self_test().unwrap();
// Return IO_Update
gpiog.pg7 = io_update.into_analog();
ad9959
};
let io_expander = {
let sda = gpiob.pb7.into_alternate_af4().set_open_drain();
@ -919,6 +847,79 @@ pub fn setup(
)
.unwrap();
let ad9959 = {
let qspi_interface = {
// Instantiate the QUADSPI pins and peripheral interface.
let qspi_pins = {
let _qspi_ncs = gpioc
.pc11
.into_alternate_af9()
.set_speed(hal::gpio::Speed::VeryHigh);
let clk = gpiob
.pb2
.into_alternate_af9()
.set_speed(hal::gpio::Speed::VeryHigh);
let io0 = gpioe
.pe7
.into_alternate_af10()
.set_speed(hal::gpio::Speed::VeryHigh);
let io1 = gpioe
.pe8
.into_alternate_af10()
.set_speed(hal::gpio::Speed::VeryHigh);
let io2 = gpioe
.pe9
.into_alternate_af10()
.set_speed(hal::gpio::Speed::VeryHigh);
let io3 = gpioe
.pe10
.into_alternate_af10()
.set_speed(hal::gpio::Speed::VeryHigh);
(clk, io0, io1, io2, io3)
};
let qspi = hal::qspi::Qspi::bank2(
device.QUADSPI,
qspi_pins,
design_parameters::POUNDER_QSPI_FREQUENCY,
&ccdr.clocks,
ccdr.peripheral.QSPI,
);
pounder::QspiInterface::new(qspi).unwrap()
};
#[cfg(feature = "pounder_v1_1")]
let reset_pin = gpiog.pg6.into_push_pull_output();
#[cfg(not(feature = "pounder_v1_1"))]
let reset_pin = gpioa.pa0.into_push_pull_output();
let mut io_update = gpiog.pg7.into_push_pull_output();
let ref_clk: hal::time::Hertz =
design_parameters::DDS_REF_CLK.into();
let mut ad9959 = ad9959::Ad9959::new(
qspi_interface,
reset_pin,
&mut io_update,
&mut delay,
ad9959::Mode::FourBitSerial,
ref_clk.0 as f32,
design_parameters::DDS_MULTIPLIER,
)
.unwrap();
ad9959.self_test().unwrap();
// Return IO_Update
gpiog.pg7 = io_update.into_analog();
ad9959
};
let dds_output = {
let io_update_trigger = {
let _io_update = gpiog