From 2b6e6f59a4e79195b1337cc51591cb64a4216223 Mon Sep 17 00:00:00 2001
From: Ryan Summers <ryan.summers@vertigo-designs.com>
Date: Mon, 4 Jan 2021 18:09:16 +0100
Subject: [PATCH] Adding comment about sample rate

---
 src/main.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/main.rs b/src/main.rs
index ede498f..5979d90 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -56,6 +56,7 @@ use heapless::{consts::*, String};
 
 // The number of ticks in the ADC sampling timer. The timer runs at 100MHz, so the step size is
 // equal to 10ns per tick.
+// Currently, the sample rate is equal to: Fsample = 100/256 MHz = 390.625 KHz
 const ADC_SAMPLE_TICKS: u32 = 256;
 
 // The desired ADC sample processing buffer size.