iir: tweak, add offset
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parent
9fc6868fdf
commit
293520e26e
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@ -19,10 +19,11 @@ load
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# monitor reset halt
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# cycle counter delta tool, place two bkpts around the section
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set var $cc=0xe0001004
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define qq
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print *0xe0001004-$t0
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set var $t0=*0xe0001004
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print *$cc-$t0
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set var $t0=*$cc
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continue
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end
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set var $t0=0xe0001004
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set var $t0=*$cc
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continue
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55
src/iir.rs
55
src/iir.rs
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@ -2,12 +2,12 @@ use core::f32;
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pub type IIRState = [f32; 5];
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#[derive(Default,Copy,Clone,Debug)]
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#[derive(Copy,Clone)]
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pub struct IIR {
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pub x_offset: f32,
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pub y_offset: f32,
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pub ba: IIRState,
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pub scale: f32,
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pub y_offset: f32,
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pub y_min: f32,
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pub y_max: f32,
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}
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fn abs(x: f32) -> f32 {
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@ -15,23 +15,27 @@ fn abs(x: f32) -> f32 {
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}
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fn copysign(x: f32, y: f32) -> f32 {
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match () {
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_ if (x >= 0. && y >= 0.) || (x <= 0. && y <= 0.) => y,
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_ => -y
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if (x >= 0. && y >= 0.) || (x <= 0. && y <= 0.) {
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x
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} else {
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-x
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}
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}
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fn macc(y0: f32, x: &[f32], a: &[f32]) -> f32 {
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y0 + x.iter().zip(a.iter()) .map(|(&i, &j)| i * j).sum::<f32>()
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}
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impl IIR {
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pub fn pi(&mut self, kp: f32, ki: f32, g: f32) -> Result<(), &str> {
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let ki = copysign(kp, ki);
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let g = copysign(kp, g);
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let (a1, b0, b1) = match () {
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_ if abs(ki) < f32::EPSILON => (0., kp, 0.),
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_ => {
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let c = match () {
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_ if abs(g) < f32::EPSILON => 1.,
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_ => 1./(1. + ki/g)
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};
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pub fn set_pi(&mut self, kp: f32, ki: f32, g: f32) -> Result<(), &'static str> {
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let ki = copysign(ki, kp);
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let g = copysign(g, kp);
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let (a1, b0, b1) =
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if abs(ki) < f32::EPSILON {
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(0., kp, 0.)
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} else {
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let c = if abs(g) < f32::EPSILON { 1. }
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else { 1./(1. + ki/g) };
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let a1 = 2.*c - 1.;
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let b0 = ki*c + kp;
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let b1 = ki*c - a1*kp;
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@ -39,8 +43,7 @@ impl IIR {
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return Err("low integrator gain and/or gain limit")
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}
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(a1, b0, b1)
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}
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};
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};
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self.ba[0] = b0;
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self.ba[1] = b1;
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self.ba[2] = 0.;
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@ -49,17 +52,17 @@ impl IIR {
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Ok(())
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}
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pub fn set_x_offset(&mut self, xo: f32) {
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let b: f32 = self.ba[..3].iter().sum();
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self.y_offset = xo*b;
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}
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pub fn update(&self, xy: &mut IIRState, x0: f32) -> f32 {
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xy.rotate_right(1);
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xy[0] = x0 + self.x_offset;
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xy[0] = x0;
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let y0 = macc(self.y_offset, xy, &self.ba)
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.min(self.scale).max(-self.scale);
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.max(self.y_min).min(self.y_max);
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xy[xy.len()/2] = y0;
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y0
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}
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}
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fn macc(y0: f32, x: &[f32], a: &[f32]) -> f32 {
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y0 + x.iter().zip(a.iter())
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.map(|(&i, &j)| i * j).sum::<f32>()
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}
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16
src/main.rs
16
src/main.rs
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@ -556,8 +556,14 @@ fn main() -> ! {
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rcc.apb1lenr.modify(|_, w| w.tim2en().set_bit());
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tim2_setup(&dp.TIM2);
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unsafe { IIR_CH[0].pi(0.1, 10.*2e-6/2., 0.).expect("bad coefficients"); }
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unsafe { IIR_CH[1].pi(-0.1, 10.*2e-6/2., 0.).expect("bad coefficients"); }
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unsafe {
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let t = 2e-6*2.;
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IIR_CH[0].set_pi(1., 0., 0.).expect("bad coefficients");
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IIR_CH[0].set_x_offset(0.*SCALE);
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IIR_CH[1].set_pi(-0.1, -10.*t, 0.).expect("bad coefficients");
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IIR_CH[1].set_x_offset(0.1*SCALE);
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}
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cortex_m::interrupt::free(|cs| {
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cp.NVIC.enable(stm32::Interrupt::SPI1);
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@ -584,8 +590,8 @@ fn TIM2() { // FIXME
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const SCALE: f32 = ((1 << 15) - 1) as f32;
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static mut IIR_STATE: [IIRState; 2] = [[0.; 5]; 2];
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static mut IIR_CH: [IIR; 2] = [
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IIR{ y_offset: 0., x_offset: 0., ba: [0., 0., 0., 0., 0.], scale: SCALE },
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IIR{ y_offset: 0., x_offset: 0., ba: [0., 0., 0., 0., 0.], scale: SCALE }];
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IIR{ ba: [0., 0., 0., 0., 0.], y_offset: 0.,
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y_min: -SCALE, y_max: SCALE }; 2];
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#[interrupt]
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fn SPI1() {
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@ -594,8 +600,8 @@ fn SPI1() {
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cortex_m::interrupt::free(|cs| {
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let spip = SPIP.borrow(cs).borrow();
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let (spi1, spi2, spi4, spi5) = spip.as_ref().unwrap();
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let sr = spi1.sr.read();
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let sr = spi1.sr.read();
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if sr.eot().bit_is_set() {
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spi1.ifcr.write(|w| w.eotc().set_bit());
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}
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