Merge pull request #381 from quartiq/feature/hal-update
Updating to HAL mainline
This commit is contained in:
commit
22381ee703
2
Cargo.lock
generated
2
Cargo.lock
generated
@ -812,7 +812,7 @@ dependencies = [
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[[package]]
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name = "stm32h7xx-hal"
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version = "0.9.0"
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source = "git+https://github.com/quartiq/stm32h7xx-hal.git?rev=b0b8a93#b0b8a930b2c3bc5fcebc2e905b4c5e13360111a5"
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source = "git+https://github.com/quartiq/stm32h7xx-hal.git?rev=acd47be#acd47beb4b84b4dc46da3a8b68688bc8c5984604"
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dependencies = [
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"bare-metal 1.0.0",
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"cast",
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@ -52,12 +52,15 @@ mcp23017 = "1.0"
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git = "https://github.com/quartiq/rtt-logger.git"
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rev = "70b0eb5"
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# fast double buffered DMA without poisoning and buffer swapping
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# The following modifications of the HAL are being used:
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# * fast double buffered DMA without poisoning and buffer swapping
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# * Utilize `master` branch of smoltcp
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# * Utilize `master` branch of HAL
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[dependencies.stm32h7xx-hal]
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features = ["stm32h743v", "rt", "unproven", "ethernet", "quadspi"]
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# version = "0.9.0"
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git = "https://github.com/quartiq/stm32h7xx-hal.git"
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rev = "b0b8a93"
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rev = "acd47be"
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# link.x section start/end
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[patch.crates-io.cortex-m-rt]
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@ -332,7 +332,7 @@ pub fn setup(
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.pb10
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.into_alternate_af5()
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.set_speed(hal::gpio::Speed::VeryHigh);
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let _spi_nss = gpiob
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let spi_nss = gpiob
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.pb9
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.into_alternate_af5()
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.set_speed(hal::gpio::Speed::VeryHigh);
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@ -341,13 +341,15 @@ pub fn setup(
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polarity: hal::spi::Polarity::IdleHigh,
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phase: hal::spi::Phase::CaptureOnSecondTransition,
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})
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.manage_cs()
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.suspend_when_inactive()
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.communication_mode(hal::spi::CommunicationMode::Receiver)
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.cs_delay(design_parameters::ADC_SETUP_TIME);
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.hardware_cs(hal::spi::HardwareCS {
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mode: hal::spi::HardwareCSMode::WordTransaction,
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assertion_delay: design_parameters::ADC_SETUP_TIME,
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polarity: hal::spi::Polarity::IdleHigh,
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})
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.communication_mode(hal::spi::CommunicationMode::Receiver);
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let spi: hal::spi::Spi<_, _, u16> = device.SPI2.spi(
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(spi_sck, spi_miso, hal::spi::NoMosi),
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(spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
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config,
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design_parameters::ADC_DAC_SCK_MAX,
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ccdr.peripheral.SPI2,
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@ -373,7 +375,7 @@ pub fn setup(
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.pc10
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.into_alternate_af6()
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.set_speed(hal::gpio::Speed::VeryHigh);
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let _spi_nss = gpioa
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let spi_nss = gpioa
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.pa15
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.into_alternate_af6()
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.set_speed(hal::gpio::Speed::VeryHigh);
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@ -382,13 +384,15 @@ pub fn setup(
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polarity: hal::spi::Polarity::IdleHigh,
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phase: hal::spi::Phase::CaptureOnSecondTransition,
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})
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.manage_cs()
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.suspend_when_inactive()
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.communication_mode(hal::spi::CommunicationMode::Receiver)
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.cs_delay(design_parameters::ADC_SETUP_TIME);
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.hardware_cs(hal::spi::HardwareCS {
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mode: hal::spi::HardwareCSMode::WordTransaction,
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assertion_delay: design_parameters::ADC_SETUP_TIME,
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polarity: hal::spi::Polarity::IdleHigh,
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})
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.communication_mode(hal::spi::CommunicationMode::Receiver);
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let spi: hal::spi::Spi<_, _, u16> = device.SPI3.spi(
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(spi_sck, spi_miso, hal::spi::NoMosi),
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(spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
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config,
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design_parameters::ADC_DAC_SCK_MAX,
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ccdr.peripheral.SPI3,
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@ -424,7 +428,7 @@ pub fn setup(
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.pe2
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.into_alternate_af5()
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.set_speed(hal::gpio::Speed::VeryHigh);
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let _spi_nss = gpioe
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let spi_nss = gpioe
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.pe4
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.into_alternate_af5()
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.set_speed(hal::gpio::Speed::VeryHigh);
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@ -433,13 +437,16 @@ pub fn setup(
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polarity: hal::spi::Polarity::IdleHigh,
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phase: hal::spi::Phase::CaptureOnSecondTransition,
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})
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.manage_cs()
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.suspend_when_inactive()
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.hardware_cs(hal::spi::HardwareCS {
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mode: hal::spi::HardwareCSMode::WordTransaction,
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assertion_delay: 0.0,
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polarity: hal::spi::Polarity::IdleHigh,
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})
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.communication_mode(hal::spi::CommunicationMode::Transmitter)
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.swap_mosi_miso();
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device.SPI4.spi(
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(spi_sck, spi_miso, hal::spi::NoMosi),
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(spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
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config,
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design_parameters::ADC_DAC_SCK_MAX,
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ccdr.peripheral.SPI4,
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@ -456,7 +463,7 @@ pub fn setup(
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.pf7
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.into_alternate_af5()
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.set_speed(hal::gpio::Speed::VeryHigh);
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let _spi_nss = gpiof
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let spi_nss = gpiof
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.pf6
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.into_alternate_af5()
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.set_speed(hal::gpio::Speed::VeryHigh);
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@ -465,13 +472,16 @@ pub fn setup(
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polarity: hal::spi::Polarity::IdleHigh,
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phase: hal::spi::Phase::CaptureOnSecondTransition,
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})
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.manage_cs()
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.hardware_cs(hal::spi::HardwareCS {
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mode: hal::spi::HardwareCSMode::WordTransaction,
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assertion_delay: 0.0,
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polarity: hal::spi::Polarity::IdleHigh,
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})
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.communication_mode(hal::spi::CommunicationMode::Transmitter)
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.suspend_when_inactive()
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.swap_mosi_miso();
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device.SPI5.spi(
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(spi_sck, spi_miso, hal::spi::NoMosi),
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(spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
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config,
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design_parameters::ADC_DAC_SCK_MAX,
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ccdr.peripheral.SPI5,
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