2020-11-03 16:41:14 +08:00
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use super::hal;
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use heapless::consts;
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pub struct Dac0Output {
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outputs: heapless::spsc::Queue<u16, consts::U32>,
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spi: hal::spi::Spi<hal::stm32::SPI4, hal::spi::Enabled, u16>,
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}
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impl Dac0Output {
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2020-11-03 16:41:45 +08:00
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pub fn new(
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spi: hal::spi::Spi<hal::stm32::SPI4, hal::spi::Enabled, u16>,
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) -> Self {
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2020-11-03 16:41:14 +08:00
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spi.inner().cr1.modify(|_, w| w.cstart().started());
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2020-11-03 16:41:45 +08:00
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Self {
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spi,
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outputs: heapless::spsc::Queue::new(),
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}
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2020-11-03 16:41:14 +08:00
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}
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pub fn push(&mut self, value: u16) {
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self.outputs.enqueue(value).unwrap();
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}
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pub fn update(&mut self) {
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match self.outputs.dequeue() {
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Some(value) => self.write(value),
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2020-11-03 16:41:45 +08:00
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None => {}
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2020-11-03 16:41:14 +08:00
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}
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}
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pub fn write(&mut self, value: u16) {
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unsafe {
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2020-11-03 16:41:45 +08:00
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core::ptr::write_volatile(
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&self.spi.inner().txdr as *const _ as *mut u16,
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value,
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);
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2020-11-03 16:41:14 +08:00
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}
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}
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}
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pub struct Dac1Output {
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outputs: heapless::spsc::Queue<u16, consts::U32>,
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spi: hal::spi::Spi<hal::stm32::SPI5, hal::spi::Enabled, u16>,
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}
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impl Dac1Output {
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pub fn new(
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spi: hal::spi::Spi<hal::stm32::SPI5, hal::spi::Enabled, u16>,
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) -> Self {
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spi.inner().cr1.modify(|_, w| w.cstart().started());
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2020-11-03 16:41:45 +08:00
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Self {
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spi,
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outputs: heapless::spsc::Queue::new(),
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}
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2020-11-03 16:41:14 +08:00
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}
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pub fn push(&mut self, value: u16) {
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self.outputs.enqueue(value).unwrap();
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}
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pub fn update(&mut self) {
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match self.outputs.dequeue() {
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Some(value) => self.write(value),
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2020-11-03 16:41:45 +08:00
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None => {}
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2020-11-03 16:41:14 +08:00
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}
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}
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pub fn write(&mut self, value: u16) {
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unsafe {
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2020-11-03 16:41:45 +08:00
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core::ptr::write_volatile(
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&self.spi.inner().txdr as *const _ as *mut u16,
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value,
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);
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2020-11-03 16:41:14 +08:00
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}
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}
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}
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